startup_stm32f031.s 10 KB

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  1. ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
  2. ;* File Name : startup_stm32f031.s
  3. ;* Author : MCD Application Team
  4. ;* Version : V1.5.0
  5. ;* Date : 24-December-2014
  6. ;* Description : STM32F031 devices vector table for EWARM toolchain.
  7. ;* This module performs:
  8. ;* - Set the initial SP
  9. ;* - Set the initial PC == iar_program_start,
  10. ;* - Set the vector table entries with the exceptions ISR
  11. ;* address
  12. ;* - Configure the system clock
  13. ;* - Branches to main in the C library (which eventually
  14. ;* calls main()).
  15. ;* After Reset the Cortex-M0 processor is in Thread mode,
  16. ;* priority is Privileged, and the Stack is set to Main.
  17. ;*******************************************************************************
  18. ; @attention
  19. ;
  20. ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  21. ; You may not use this file except in compliance with the License.
  22. ; You may obtain a copy of the License at:
  23. ;
  24. ; http://www.st.com/software_license_agreement_liberty_v2
  25. ;
  26. ; Unless required by applicable law or agreed to in writing, software
  27. ; distributed under the License is distributed on an "AS IS" BASIS,
  28. ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  29. ; See the License for the specific language governing permissions and
  30. ; limitations under the License.
  31. ;
  32. ;*******************************************************************************
  33. ;
  34. ;
  35. ; The modules in this file are included in the libraries, and may be replaced
  36. ; by any user-defined modules that define the PUBLIC symbol _program_start or
  37. ; a user defined start symbol.
  38. ; To override the cstartup defined in the library, simply add your modified
  39. ; version to the workbench project.
  40. ;
  41. ; The vector table is normally located at address 0.
  42. ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
  43. ; The name "__vector_table" has special meaning for C-SPY:
  44. ; it is where the SP start value is found, and the NVIC vector
  45. ; table register (VTOR) is initialized to this address if != 0.
  46. ;
  47. ; Cortex-M version
  48. ;
  49. MODULE ?cstartup
  50. ;; Forward declaration of sections.
  51. SECTION CSTACK:DATA:NOROOT(3)
  52. SECTION .intvec:CODE:NOROOT(2)
  53. EXTERN __iar_program_start
  54. EXTERN SystemInit
  55. PUBLIC __vector_table
  56. DATA
  57. __vector_table
  58. DCD sfe(CSTACK)
  59. DCD Reset_Handler ; Reset Handler
  60. DCD NMI_Handler ; NMI Handler
  61. DCD HardFault_Handler ; Hard Fault Handler
  62. DCD 0 ; Reserved
  63. DCD 0 ; Reserved
  64. DCD 0 ; Reserved
  65. DCD 0 ; Reserved
  66. DCD 0 ; Reserved
  67. DCD 0 ; Reserved
  68. DCD 0 ; Reserved
  69. DCD SVC_Handler ; SVCall Handler
  70. DCD 0 ; Reserved
  71. DCD 0 ; Reserved
  72. DCD PendSV_Handler ; PendSV Handler
  73. DCD SysTick_Handler ; SysTick Handler
  74. ; External Interrupts
  75. DCD WWDG_IRQHandler ; Window Watchdog
  76. DCD PVD_IRQHandler ; PVD through EXTI Line detect
  77. DCD RTC_IRQHandler ; RTC through EXTI Line
  78. DCD FLASH_IRQHandler ; FLASH
  79. DCD RCC_IRQHandler ; RCC
  80. DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
  81. DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
  82. DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
  83. DCD 0 ; Reserved
  84. DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
  85. DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
  86. DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
  87. DCD ADC1_IRQHandler ; ADC1
  88. DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
  89. DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
  90. DCD TIM2_IRQHandler ; TIM2
  91. DCD TIM3_IRQHandler ; TIM3
  92. DCD 0 ; Reserved
  93. DCD 0 ; Reserved
  94. DCD TIM14_IRQHandler ; TIM14
  95. DCD 0 ; Reserved
  96. DCD TIM16_IRQHandler ; TIM16
  97. DCD TIM17_IRQHandler ; TIM17
  98. DCD I2C1_IRQHandler ; I2C1
  99. DCD 0 ; Reserved
  100. DCD SPI1_IRQHandler ; SPI1
  101. DCD 0 ; Reserved
  102. DCD USART1_IRQHandler ; USART1
  103. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
  104. ;;
  105. ;; Default interrupt handlers.
  106. ;;
  107. THUMB
  108. PUBWEAK Reset_Handler
  109. SECTION .text:CODE:NOROOT:REORDER(2)
  110. Reset_Handler
  111. LDR R0, =sfe(CSTACK) ; set stack pointer
  112. MSR MSP, R0
  113. ;;Check if boot space corresponds to test memory
  114. LDR R0,=0x00000004
  115. LDR R1, [R0]
  116. LSRS R1, R1, #24
  117. LDR R2,=0x1F
  118. CMP R1, R2
  119. BNE ApplicationStart
  120. ;; SYSCFG clock enable
  121. LDR R0,=0x40021018
  122. LDR R1,=0x00000001
  123. STR R1, [R0]
  124. ;; Set CFGR1 register with flash memory remap at address 0
  125. LDR R0,=0x40010000
  126. LDR R1,=0x00000000
  127. STR R1, [R0]
  128. ApplicationStart
  129. LDR R0, =SystemInit
  130. BLX R0
  131. LDR R0, =__iar_program_start
  132. BX R0
  133. PUBWEAK NMI_Handler
  134. SECTION .text:CODE:NOROOT:REORDER(1)
  135. NMI_Handler
  136. B NMI_Handler
  137. PUBWEAK HardFault_Handler
  138. SECTION .text:CODE:NOROOT:REORDER(1)
  139. HardFault_Handler
  140. B HardFault_Handler
  141. PUBWEAK SVC_Handler
  142. SECTION .text:CODE:NOROOT:REORDER(1)
  143. SVC_Handler
  144. B SVC_Handler
  145. PUBWEAK PendSV_Handler
  146. SECTION .text:CODE:NOROOT:REORDER(1)
  147. PendSV_Handler
  148. B PendSV_Handler
  149. PUBWEAK SysTick_Handler
  150. SECTION .text:CODE:NOROOT:REORDER(1)
  151. SysTick_Handler
  152. B SysTick_Handler
  153. PUBWEAK WWDG_IRQHandler
  154. SECTION .text:CODE:NOROOT:REORDER(1)
  155. WWDG_IRQHandler
  156. B WWDG_IRQHandler
  157. PUBWEAK PVD_IRQHandler
  158. SECTION .text:CODE:NOROOT:REORDER(1)
  159. PVD_IRQHandler
  160. B PVD_IRQHandler
  161. PUBWEAK RTC_IRQHandler
  162. SECTION .text:CODE:NOROOT:REORDER(1)
  163. RTC_IRQHandler
  164. B RTC_IRQHandler
  165. PUBWEAK FLASH_IRQHandler
  166. SECTION .text:CODE:NOROOT:REORDER(1)
  167. FLASH_IRQHandler
  168. B FLASH_IRQHandler
  169. PUBWEAK RCC_IRQHandler
  170. SECTION .text:CODE:NOROOT:REORDER(1)
  171. RCC_IRQHandler
  172. B RCC_IRQHandler
  173. PUBWEAK EXTI0_1_IRQHandler
  174. SECTION .text:CODE:NOROOT:REORDER(1)
  175. EXTI0_1_IRQHandler
  176. B EXTI0_1_IRQHandler
  177. PUBWEAK EXTI2_3_IRQHandler
  178. SECTION .text:CODE:NOROOT:REORDER(1)
  179. EXTI2_3_IRQHandler
  180. B EXTI2_3_IRQHandler
  181. PUBWEAK EXTI4_15_IRQHandler
  182. SECTION .text:CODE:NOROOT:REORDER(1)
  183. EXTI4_15_IRQHandler
  184. B EXTI4_15_IRQHandler
  185. PUBWEAK DMA1_Channel1_IRQHandler
  186. SECTION .text:CODE:NOROOT:REORDER(1)
  187. DMA1_Channel1_IRQHandler
  188. B DMA1_Channel1_IRQHandler
  189. PUBWEAK DMA1_Channel2_3_IRQHandler
  190. SECTION .text:CODE:NOROOT:REORDER(1)
  191. DMA1_Channel2_3_IRQHandler
  192. B DMA1_Channel2_3_IRQHandler
  193. PUBWEAK DMA1_Channel4_5_IRQHandler
  194. SECTION .text:CODE:NOROOT:REORDER(1)
  195. DMA1_Channel4_5_IRQHandler
  196. B DMA1_Channel4_5_IRQHandler
  197. PUBWEAK ADC1_IRQHandler
  198. SECTION .text:CODE:NOROOT:REORDER(1)
  199. ADC1_IRQHandler
  200. B ADC1_IRQHandler
  201. PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
  202. SECTION .text:CODE:NOROOT:REORDER(1)
  203. TIM1_BRK_UP_TRG_COM_IRQHandler
  204. B TIM1_BRK_UP_TRG_COM_IRQHandler
  205. PUBWEAK TIM1_CC_IRQHandler
  206. SECTION .text:CODE:NOROOT:REORDER(1)
  207. TIM1_CC_IRQHandler
  208. B TIM1_CC_IRQHandler
  209. PUBWEAK TIM2_IRQHandler
  210. SECTION .text:CODE:NOROOT:REORDER(1)
  211. TIM2_IRQHandler
  212. B TIM2_IRQHandler
  213. PUBWEAK TIM3_IRQHandler
  214. SECTION .text:CODE:NOROOT:REORDER(1)
  215. TIM3_IRQHandler
  216. B TIM3_IRQHandler
  217. PUBWEAK TIM14_IRQHandler
  218. SECTION .text:CODE:NOROOT:REORDER(1)
  219. TIM14_IRQHandler
  220. B TIM14_IRQHandler
  221. PUBWEAK TIM16_IRQHandler
  222. SECTION .text:CODE:NOROOT:REORDER(1)
  223. TIM16_IRQHandler
  224. B TIM16_IRQHandler
  225. PUBWEAK TIM17_IRQHandler
  226. SECTION .text:CODE:NOROOT:REORDER(1)
  227. TIM17_IRQHandler
  228. B TIM17_IRQHandler
  229. PUBWEAK I2C1_IRQHandler
  230. SECTION .text:CODE:NOROOT:REORDER(1)
  231. I2C1_IRQHandler
  232. B I2C1_IRQHandler
  233. PUBWEAK SPI1_IRQHandler
  234. SECTION .text:CODE:NOROOT:REORDER(1)
  235. SPI1_IRQHandler
  236. B SPI1_IRQHandler
  237. PUBWEAK USART1_IRQHandler
  238. SECTION .text:CODE:NOROOT:REORDER(1)
  239. USART1_IRQHandler
  240. B USART1_IRQHandler
  241. END
  242. ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****