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- ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
- ;* File Name : startup_stm32f030xc.s
- ;* Author : MCD Application Team
- ;* Version : V1.5.0
- ;* Date : 24-December-2014
- ;* Description : STM32F030xC devices vector table for EWARM toolchain.
- ;* This module performs:
- ;* - Set the initial SP
- ;* - Set the initial PC == __iar_program_start,
- ;* - Set the vector table entries with the exceptions ISR
- ;* address.
- ;* After Reset the Cortex-M0 processor is in Thread mode,
- ;* priority is Privileged, and the Stack is set to Main.
- ;*******************************************************************************
- ; @attention
- ;
- ; Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
- ; You may not use this file except in compliance with the License.
- ; You may obtain a copy of the License at:
- ;
- ; http://www.st.com/software_license_agreement_liberty_v2
- ;
- ; Unless required by applicable law or agreed to in writing, software
- ; distributed under the License is distributed on an "AS IS" BASIS,
- ; WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- ; See the License for the specific language governing permissions and
- ; limitations under the License.
- ;
- ;*******************************************************************************
- ;
- ;
- ; The modules in this file are included in the libraries, and may be replaced
- ; by any user-defined modules that define the PUBLIC symbol _program_start or
- ; a user defined start symbol.
- ; To override the cstartup defined in the library, simply add your modified
- ; version to the workbench project.
- ;
- ; The vector table is normally located at address 0.
- ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
- ; The name "__vector_table" has special meaning for C-SPY:
- ; it is where the SP start value is found, and the NVIC vector
- ; table register (VTOR) is initialized to this address if != 0.
- ;
- ; Cortex-M version
- ;
- MODULE ?cstartup
- ;; Forward declaration of sections.
- SECTION CSTACK:DATA:NOROOT(3)
- SECTION .intvec:CODE:NOROOT(2)
- EXTERN __iar_program_start
- EXTERN SystemInit
- PUBLIC __vector_table
- DATA
- __vector_table
- DCD sfe(CSTACK)
- DCD Reset_Handler ; Reset Handler
- DCD NMI_Handler ; NMI Handler
- DCD HardFault_Handler ; Hard Fault Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD SVC_Handler ; SVCall Handler
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- DCD PendSV_Handler ; PendSV Handler
- DCD SysTick_Handler ; SysTick Handler
- ; External Interrupts
- DCD WWDG_IRQHandler ; Window Watchdog
- DCD 0 ; Reserved
- DCD RTC_IRQHandler ; RTC through EXTI Line
- DCD FLASH_IRQHandler ; FLASH
- DCD RCC_IRQHandler ; RCC
- DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
- DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
- DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
- DCD 0 ; Reserved
- DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1
- DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3
- DCD DMA1_Channel4_5_IRQHandler ; DMA1 Channel 4 and Channel 5
- DCD ADC1_IRQHandler ; ADC1
- DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
- DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
- DCD 0 ; Reserved
- DCD TIM3_IRQHandler ; TIM3
- DCD TIM6_IRQHandler ; TIM6
- DCD TIM7_IRQHandler ; TIM7
- DCD TIM14_IRQHandler ; TIM14
- DCD TIM15_IRQHandler ; TIM15
- DCD TIM16_IRQHandler ; TIM16
- DCD TIM17_IRQHandler ; TIM17
- DCD I2C1_IRQHandler ; I2C1
- DCD I2C2_IRQHandler ; I2C2
- DCD SPI1_IRQHandler ; SPI1
- DCD SPI2_IRQHandler ; SPI2
- DCD USART1_IRQHandler ; USART1
- DCD USART2_IRQHandler ; USART2
- DCD USART3_6_IRQHandler ; USART3, USART4, USART5, USART6
- DCD 0 ; Reserved
- DCD 0 ; Reserved
- ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
- ;;
- ;; Default interrupt handlers.
- ;;
- THUMB
- PUBWEAK Reset_Handler
- SECTION .text:CODE:NOROOT:REORDER(2)
- Reset_Handler
- LDR R0, =sfe(CSTACK) ; set stack pointer
- MSR MSP, R0
- ;;Check if boot space corresponds to test memory
- LDR R0,=0x00000004
- LDR R1, [R0]
- LSRS R1, R1, #24
- LDR R2,=0x1F
- CMP R1, R2
-
- BNE ApplicationStart
- ;; SYSCFG clock enable
- LDR R0,=0x40021018
- LDR R1,=0x00000001
- STR R1, [R0]
-
- ;; Set CFGR1 register with flash memory remap at address 0
- LDR R0,=0x40010000
- LDR R1,=0x00000000
- STR R1, [R0]
- ApplicationStart
- LDR R0, =SystemInit
- BLX R0
- LDR R0, =__iar_program_start
- BX R0
-
- PUBWEAK NMI_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- NMI_Handler
- B NMI_Handler
- PUBWEAK HardFault_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- HardFault_Handler
- B HardFault_Handler
- PUBWEAK SVC_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SVC_Handler
- B SVC_Handler
- PUBWEAK PendSV_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- PendSV_Handler
- B PendSV_Handler
- PUBWEAK SysTick_Handler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SysTick_Handler
- B SysTick_Handler
- PUBWEAK WWDG_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- WWDG_IRQHandler
- B WWDG_IRQHandler
- PUBWEAK RTC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- RTC_IRQHandler
- B RTC_IRQHandler
- PUBWEAK FLASH_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- FLASH_IRQHandler
- B FLASH_IRQHandler
- PUBWEAK RCC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- RCC_IRQHandler
- B RCC_IRQHandler
- PUBWEAK EXTI0_1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI0_1_IRQHandler
- B EXTI0_1_IRQHandler
- PUBWEAK EXTI2_3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI2_3_IRQHandler
- B EXTI2_3_IRQHandler
- PUBWEAK EXTI4_15_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- EXTI4_15_IRQHandler
- B EXTI4_15_IRQHandler
- PUBWEAK DMA1_Channel1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel1_IRQHandler
- B DMA1_Channel1_IRQHandler
- PUBWEAK DMA1_Channel2_3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel2_3_IRQHandler
- B DMA1_Channel2_3_IRQHandler
- PUBWEAK DMA1_Channel4_5_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- DMA1_Channel4_5_IRQHandler
- B DMA1_Channel4_5_IRQHandler
- PUBWEAK ADC1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- ADC1_IRQHandler
- B ADC1_IRQHandler
- PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM1_BRK_UP_TRG_COM_IRQHandler
- B TIM1_BRK_UP_TRG_COM_IRQHandler
- PUBWEAK TIM1_CC_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM1_CC_IRQHandler
- B TIM1_CC_IRQHandler
- PUBWEAK TIM3_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM3_IRQHandler
- B TIM3_IRQHandler
- PUBWEAK TIM6_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM6_IRQHandler
- B TIM6_IRQHandler
-
- PUBWEAK TIM7_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM7_IRQHandler
- B TIM7_IRQHandler
- PUBWEAK TIM14_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM14_IRQHandler
- B TIM14_IRQHandler
- PUBWEAK TIM15_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM15_IRQHandler
- B TIM15_IRQHandler
- PUBWEAK TIM16_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM16_IRQHandler
- B TIM16_IRQHandler
- PUBWEAK TIM17_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- TIM17_IRQHandler
- B TIM17_IRQHandler
- PUBWEAK I2C1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C1_IRQHandler
- B I2C1_IRQHandler
- PUBWEAK I2C2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- I2C2_IRQHandler
- B I2C2_IRQHandler
- PUBWEAK SPI1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SPI1_IRQHandler
- B SPI1_IRQHandler
- PUBWEAK SPI2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- SPI2_IRQHandler
- B SPI2_IRQHandler
- PUBWEAK USART1_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- USART1_IRQHandler
- B USART1_IRQHandler
- PUBWEAK USART2_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- USART2_IRQHandler
- B USART2_IRQHandler
- PUBWEAK USART3_6_IRQHandler
- SECTION .text:CODE:NOROOT:REORDER(1)
- USART3_6_IRQHandler
- B USART3_6_IRQHandler
- END
- ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
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