NRF_24L01.C 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393
  1. /******************************************************************************/
  2. /* -- 深圳安信可科技有限公司 -- */
  3. /*
  4. // 文件名:
  5. // 说明:
  6. // 编写人员:
  7. // 编写日期:
  8. // 程序维护:
  9. // 维护记录:
  10. //
  11. //
  12. */
  13. // 免责声明:该程序仅用于学习与交流
  14. // (c) Anxinke Corporation. All rights reserved.
  15. /******************************************************************************/
  16. //#include "typedef.h"
  17. #include <intrins.h>
  18. #include <string.h>
  19. #include "NRF_24L01.h"
  20. //#include "UART.H"
  21. #include "delay.h"
  22. #define uchar unsigned char
  23. uchar const TX_ADDRESS[TX_ADR_WIDTH] = {0x34, 0x43, 0x10, 0x10, 0x01}; // Define a static TX address
  24. idata uchar rx_buf[TX_PLOAD_WIDTH];
  25. idata uchar tx_buf[TX_PLOAD_WIDTH];
  26. uchar flag;
  27. /**************************************************/
  28. //sbit LED1= P3^7;
  29. /**************************************************/
  30. unsigned char bdata sta;
  31. sbit RX_DR = sta ^ 6;
  32. sbit TX_DS = sta ^ 5;
  33. sbit MAX_RT = sta ^ 4;
  34. /**************************************************/
  35. /**************************************************
  36. Function: init_io();
  37. Description:
  38. flash led one time,chip enable(ready to TX or RX Mode),
  39. Spi disable,Spi clock line init high
  40. /**************************************************/
  41. #define KEY 0xaa
  42. void init_nrf24l01_io ( void )
  43. {
  44. CE = 0; // chip enable
  45. CSN = 1; // Spi disable
  46. SCK = 0; // Spi clock line init high
  47. }
  48. /**************************************************
  49. Function: SPI_RW();
  50. Description:
  51. Writes one byte to nRF24L01, and return the byte read
  52. from nRF24L01 during write, according to SPI protocol
  53. /**************************************************/
  54. bdata unsigned char st = 0;
  55. sbit st_1 = st ^ 0;
  56. sbit st_2 = st ^ 1;
  57. sbit st_3 = st ^ 2;
  58. sbit st_4 = st ^ 3;
  59. sbit st_5 = st ^ 4;
  60. sbit st_6 = st ^ 5;
  61. sbit st_7 = st ^ 6;
  62. sbit st_8 = st ^ 7;
  63. bdata unsigned char st1 = 0;
  64. sbit st_11 = st1 ^ 0;
  65. sbit st_12 = st1 ^ 1;
  66. sbit st_13 = st1 ^ 2;
  67. sbit st_14 = st1 ^ 3;
  68. sbit st_15 = st1 ^ 4;
  69. sbit st_16 = st1 ^ 5;
  70. sbit st_17 = st1 ^ 6;
  71. sbit st_18 = st1 ^ 7;
  72. /*
  73. uchar SPI_RW(uchar byte)
  74. {
  75. uchar bit_ctr;
  76. for(bit_ctr=0;bit_ctr<8;bit_ctr++) // output 8-bit
  77. {
  78. MOSI = (byte & 0x80); // output 'byte', MSB to MOSI
  79. byte = (byte << 1); // shift next bit into MSB..
  80. SCK = 1; // Set SCK high..
  81. MISO=1;
  82. byte |= MISO; // capture current MISO bit
  83. SCK = 0; // ..then set SCK low again
  84. }
  85. return(byte); // return read byte
  86. }
  87. */
  88. uchar SPI_RW ( uchar byte )
  89. {
  90. //uchar bit_ctr;
  91. st = byte;
  92. MOSI = st_8;
  93. SCK = 1;
  94. st_18 = MISO;
  95. SCK = 0;
  96. MOSI = st_7;
  97. SCK = 1;
  98. st_17 = MISO;
  99. SCK = 0;
  100. MOSI = st_6;
  101. SCK = 1;
  102. st_16 = MISO;
  103. SCK = 0;
  104. MOSI = st_5;
  105. SCK = 1;
  106. st_15 = MISO;
  107. SCK = 0;
  108. MOSI = st_4;
  109. SCK = 1;
  110. st_14 = MISO;
  111. SCK = 0;
  112. MOSI = st_3;
  113. SCK = 1;
  114. st_13 = MISO;
  115. SCK = 0;
  116. MOSI = st_2;
  117. SCK = 1;
  118. st_12 = MISO;
  119. SCK = 0;
  120. MOSI = st_1;
  121. SCK = 1;
  122. st_11 = MISO;
  123. SCK = 0;
  124. return ( st1 ); // return read byte
  125. }
  126. /**************************************************/
  127. /**************************************************
  128. Function: SPI_RW_Reg();
  129. Description:
  130. Writes value 'value' to register 'reg'
  131. /**************************************************/
  132. uchar SPI_RW_Reg ( BYTE reg, BYTE value )
  133. {
  134. uchar status;
  135. CSN = 0; // CSN low, init SPI transaction
  136. status = SPI_RW ( reg ); // select register
  137. SPI_RW ( value ); // ..and write value to it..
  138. CSN = 1; // CSN high again
  139. return ( status ); // return nRF24L01 status byte
  140. }
  141. /**************************************************/
  142. /**************************************************
  143. Function: SPI_Read();
  144. Description:
  145. Read one byte from nRF24L01 register, 'reg'
  146. /**************************************************/
  147. BYTE SPI_Read ( BYTE reg )
  148. {
  149. BYTE reg_val;
  150. CSN = 0; // CSN low, initialize SPI communication...
  151. SPI_RW ( reg ); // Select register to read from..
  152. reg_val = SPI_RW ( 0 ); // ..then read registervalue
  153. CSN = 1; // CSN high, terminate SPI communication
  154. return ( reg_val ); // return register value
  155. }
  156. /**************************************************/
  157. /**************************************************
  158. Function: SPI_Read_Buf();
  159. Description:
  160. Reads 'bytes' #of bytes from register 'reg'
  161. Typically used to read RX payload, Rx/Tx address
  162. /**************************************************/
  163. uchar SPI_Read_Buf ( BYTE reg, BYTE *pBuf, BYTE bytes )
  164. {
  165. uchar status, byte_ctr;
  166. CSN = 0; // Set CSN low, init SPI tranaction
  167. status = SPI_RW ( reg ); // Select register to write to and read status byte
  168. for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ )
  169. pBuf[byte_ctr] = SPI_RW ( 0 ); // Perform SPI_RW to read byte from nRF24L01
  170. CSN = 1; // Set CSN high again
  171. return ( status ); // return nRF24L01 status byte
  172. }
  173. /**************************************************/
  174. /**************************************************
  175. Function: SPI_Write_Buf();
  176. Description:
  177. Writes contents of buffer '*pBuf' to nRF24L01
  178. Typically used to write TX payload, Rx/Tx address
  179. /**************************************************/
  180. uchar SPI_Write_Buf ( BYTE reg, BYTE *pBuf, BYTE bytes )
  181. {
  182. uchar status, byte_ctr;
  183. CSN = 0; // Set CSN low, init SPI tranaction
  184. status = SPI_RW ( reg ); // Select register to write to and read status byte
  185. for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ ) // then write all byte in buffer(*pBuf)
  186. SPI_RW ( *pBuf++ );
  187. CSN = 1; // Set CSN high again
  188. return ( status ); // return nRF24L01 status byte
  189. }
  190. /**************************************************/
  191. /**************************************************
  192. Function: RX_Mode();
  193. Description:
  194. This function initializes one nRF24L01 device to
  195. RX Mode, set RX address, writes RX payload width,
  196. select RF channel, datarate & LNA HCURR.
  197. After init, CE is toggled high, which means that
  198. this device is now ready to receive a datapacket.
  199. /**************************************************/
  200. void power_off()
  201. {
  202. CE = 0;
  203. SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0D );
  204. CE = 1;
  205. Timer3_Delay10us ( 2 );
  206. }
  207. void ifnnrf_rx_mode ( void )
  208. {
  209. power_off();
  210. CE = 0;
  211. SPI_Write_Buf ( WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH ); // Use the same address on the RX device as the TX device
  212. SPI_RW_Reg ( WRITE_REG + EN_AA, 0x01 ); // Enable Auto.Ack:Pipe0
  213. SPI_RW_Reg ( WRITE_REG + EN_RXADDR, 0x01 ); // Enable Pipe0
  214. SPI_RW_Reg ( WRITE_REG + RF_CH, 40 ); // Select RF channel 40
  215. SPI_RW_Reg ( WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH ); // Select same RX payload width as TX Payload width
  216. SPI_RW_Reg ( WRITE_REG + RF_SETUP, 0x27 ); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
  217. SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0f ); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enabled..
  218. CE = 1; // Set CE pin high to enable RX device
  219. // This device is now ready to receive one packet of 16 bytes payload from a TX device sending to address
  220. // '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps.
  221. }
  222. /**************************************************/
  223. /**************************************************
  224. Function: TX_Mode();
  225. Description:
  226. This function initializes one nRF24L01 device to
  227. TX mode, set TX address, set RX address for auto.ack,
  228. fill TX payload, select RF channel, datarate & TX pwr.
  229. PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
  230. ToDo: One high pulse(>10us) on CE will now send this
  231. packet and expext an acknowledgment from the RX device.
  232. /**************************************************/
  233. void ifnnrf_tx_mode ( void )
  234. {
  235. power_off();
  236. CE = 0;
  237. SPI_Write_Buf ( WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH ); // Writes TX_Address to nRF24L01
  238. SPI_Write_Buf ( WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH ); // RX_Addr0 same as TX_Adr for Auto.Ack
  239. SPI_Write_Buf ( WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH ); // Writes data to TX payload
  240. SPI_RW_Reg ( WRITE_REG + EN_AA, 0x01 ); // Enable Auto.Ack:Pipe0
  241. SPI_RW_Reg ( WRITE_REG + EN_RXADDR, 0x01 ); // Enable Pipe0
  242. SPI_RW_Reg ( WRITE_REG + SETUP_RETR, 0x1a ); // 500us + 86us, 10 retrans...
  243. SPI_RW_Reg ( WRITE_REG + RF_CH, 40 ); // Select RF channel 40
  244. SPI_RW_Reg ( WRITE_REG + RF_SETUP, 0x27 ); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
  245. SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0e ); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & TX_DS enabled..
  246. CE = 1;
  247. }
  248. void SPI_CLR_Reg ( BYTE R_T )
  249. {
  250. CSN = 0;
  251. if ( R_T == 1 ) // CSN low, init SPI transaction
  252. SPI_RW ( FLUSH_TX ); // ..and write value to it..
  253. else
  254. SPI_RW ( FLUSH_RX ); // ..and write value to it..
  255. CSN = 1; // CSN high again
  256. }
  257. void ifnnrf_CLERN_ALL()
  258. {
  259. SPI_CLR_Reg ( 0 );
  260. SPI_CLR_Reg ( 1 );
  261. SPI_RW_Reg ( WRITE_REG + STATUS, 0xff );
  262. IRQ = 1;
  263. }
  264. /*测试*/
  265. bool nrf24l01_send ( BYTE *pBuf, BYTE bytes )
  266. {
  267. BYTE time = 100; //
  268. IRQ = 1; //中断=1
  269. SPI_RW_Reg ( WRITE_REG + STATUS, 0xff ); //清写寄存器
  270. //发送
  271. memcpy ( tx_buf, pBuf, bytes < TX_PLOAD_WIDTH ? bytes : TX_PLOAD_WIDTH );
  272. ifnnrf_tx_mode();
  273. //返回状态
  274. while ( IRQ && time>0 ){time--;}
  275. sta = SPI_Read ( STATUS ); //读取状态
  276. SPI_RW_Reg ( WRITE_REG + STATUS, 0xff ); //清写寄存器
  277. if ( ! ( sta & STA_MARK_TX ) ) //发送成功
  278. {
  279. ifnnrf_CLERN_ALL();
  280. return 0;
  281. }
  282. //切换接收模式
  283. ifnnrf_rx_mode();
  284. IRQ = 1;
  285. return 1;
  286. }
  287. BYTE nrf24l01_recv ( BYTE *pBuf )
  288. {
  289. BYTE time = 100; //
  290. if ( IRQ == 0 ) //中断信号
  291. {
  292. sta = SPI_Read ( STATUS );
  293. SPI_RW_Reg ( WRITE_REG + STATUS, 0xff ); //清写寄存器
  294. if ( sta & STA_MARK_RX ) //接收成功
  295. {
  296. SPI_Read_Buf ( RD_RX_PLOAD, rx_buf, TX_PLOAD_WIDTH );
  297. //处理rx_buf
  298. //清理rx_buf
  299. memset ( rx_buf, 0, TX_PLOAD_WIDTH );
  300. }
  301. else
  302. {
  303. ifnnrf_CLERN_ALL();
  304. ifnnrf_rx_mode();
  305. while ( IRQ == 0 && time>0 ){time--;}
  306. }
  307. }
  308. }
  309. void if_main ( void )
  310. {
  311. Timer3_Delay100ms ( 1 );
  312. init_nrf24l01_io();
  313. ifnnrf_rx_mode();
  314. }