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- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 1
- C51 COMPILER V9.53.0.0, COMPILATION OF MODULE NRF_24L01
- OBJECT MODULE PLACED IN .\Output\NRF_24L01.obj
- COMPILER INVOKED BY: D:\Keil_v5\C51\BIN\C51.EXE Code\User\Driver\NRF_24L01.C OPTIMIZE(8,SPEED) BROWSE INCDIR(Code/Includ
- -e;Code/User;Code/User/Common;Code/User/Driver) DEFINE(FOSC_160000) DEBUG OBJECTEXTEND PRINT(.\Output\LST\NRF_24L01.lst)
- -TABS(2) OBJECT(.\Output\NRF_24L01.obj)
- line level source
- 1 /******************************************************************************/
- 2 /* -- 深圳安信可科技有限公司 -- */
- 3 /*
- 4 // 文件名：
- 5 // 说明：
- 6 // 编写人员：
- 7 // 编写日期：
- 8 // 程序维护：
- 9 // 维护记录：
- 10 //
- 11 //
- 12 */
- 13 // 免责声明：该程序仅用于学习与交流
- 14 // (c) Anxinke Corporation. All rights reserved.
- 15 /******************************************************************************/
- 16 //#include "typedef.h"
- 17 #include <intrins.h>
- 18 #include <string.h>
- 19 #include "NRF_24L01.h"
- *** ERROR C129 IN LINE 88 OF Code\User\Driver\NRF_24L01.h: missing ';' before 'SPI_RW'
- 20 //#include "UART.H"
- 21 #include "delay.h"
- 22
- 23 #define uchar unsigned char
- 24
- 25
- 26 uchar const TX_ADDRESS[TX_ADR_WIDTH] = {0x34, 0x43, 0x10, 0x10, 0x01}; // Define a static TX address
- 27
- 28 idata uchar rx_buf[TX_PLOAD_WIDTH];
- 29
- 30 idata uchar tx_buf[TX_PLOAD_WIDTH];
- 31
- 32 uchar flag;
- 33
- 34
- 35
- 36 /**************************************************/
- 37
- 38
- 39
- 40 //sbit LED1= P3^7;
- 41 /**************************************************/
- 42 unsigned char bdata sta;
- 43
- 44 sbit RX_DR = sta ^ 6;
- 45
- 46 sbit TX_DS = sta ^ 5;
- 47
- 48 sbit MAX_RT = sta ^ 4;
- 49 /**************************************************/
- 50
- 51 /**************************************************
- 52 Function: init_io();
- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 2
- 53 Description:
- 54 flash led one time,chip enable(ready to TX or RX Mode),
- 55 Spi disable,Spi clock line init high
- 56 /**************************************************/
- 57 #define KEY 0xaa
- 58 void init_nrf24l01_io ( void )
- 59 {
- 60 CE = 0; // chip enable
- 61 CSN = 1; // Spi disable
- 62 SCK = 0; // Spi clock line init high
- 63 }
- 64 /**************************************************
- 65 Function: SPI_RW();
- 66
- 67 Description:
- 68 Writes one byte to nRF24L01, and return the byte read
- 69 from nRF24L01 during write, according to SPI protocol
- 70 /**************************************************/
- 71 bdata unsigned char st = 0;
- 72 sbit st_1 = st ^ 0;
- 73 sbit st_2 = st ^ 1;
- 74 sbit st_3 = st ^ 2;
- 75 sbit st_4 = st ^ 3;
- 76 sbit st_5 = st ^ 4;
- 77 sbit st_6 = st ^ 5;
- 78 sbit st_7 = st ^ 6;
- 79 sbit st_8 = st ^ 7;
- 80 bdata unsigned char st1 = 0;
- 81 sbit st_11 = st1 ^ 0;
- 82 sbit st_12 = st1 ^ 1;
- 83 sbit st_13 = st1 ^ 2;
- 84 sbit st_14 = st1 ^ 3;
- 85 sbit st_15 = st1 ^ 4;
- 86 sbit st_16 = st1 ^ 5;
- 87 sbit st_17 = st1 ^ 6;
- 88 sbit st_18 = st1 ^ 7;
- 89 /*
- 90 uchar SPI_RW(uchar byte)
- 91 {
- 92 uchar bit_ctr;
- 93 for(bit_ctr=0;bit_ctr<8;bit_ctr++) // output 8-bit
- 94 {
- 95 MOSI = (byte & 0x80); // output 'byte', MSB to MOSI
- 96 byte = (byte << 1); // shift next bit into MSB..
- 97 SCK = 1; // Set SCK high..
- 98 MISO=1;
- 99 byte |= MISO; // capture current MISO bit
- 100 SCK = 0; // ..then set SCK low again
- 101 }
- 102 return(byte); // return read byte
- 103 }
- 104 */
- 105
- 106 uchar SPI_RW ( uchar byte )
- 107 {
- 108 //uchar bit_ctr;
- 109
- 110 st = byte;
- 111
- 112 MOSI = st_8;
- 113 SCK = 1;
- 114 st_18 = MISO;
- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 3
- 115 SCK = 0;
- 116
- 117 MOSI = st_7;
- 118 SCK = 1;
- 119 st_17 = MISO;
- 120 SCK = 0;
- 121
- 122 MOSI = st_6;
- 123 SCK = 1;
- 124 st_16 = MISO;
- 125 SCK = 0;
- 126
- 127 MOSI = st_5;
- 128 SCK = 1;
- 129 st_15 = MISO;
- 130 SCK = 0;
- 131
- 132 MOSI = st_4;
- 133 SCK = 1;
- 134 st_14 = MISO;
- 135 SCK = 0;
- 136
- 137 MOSI = st_3;
- 138 SCK = 1;
- 139 st_13 = MISO;
- 140 SCK = 0;
- 141
- 142 MOSI = st_2;
- 143 SCK = 1;
- 144 st_12 = MISO;
- 145 SCK = 0;
- 146
- 147 MOSI = st_1;
- 148 SCK = 1;
- 149 st_11 = MISO;
- 150 SCK = 0;
- 151 return ( st1 ); // return read byte
- 152 }
- 153 /**************************************************/
- 154
- 155 /**************************************************
- 156 Function: SPI_RW_Reg();
- 157
- 158 Description:
- 159 Writes value 'value' to register 'reg'
- 160 /**************************************************/
- 161 uchar SPI_RW_Reg ( BYTE reg, BYTE value )
- 162 {
- 163 uchar status;
- 164 CSN = 0; // CSN low, init SPI transaction
- 165 status = SPI_RW ( reg ); // select register
- 166 SPI_RW ( value ); // ..and write value to it..
- 167 CSN = 1; // CSN high again
- 168 return ( status ); // return nRF24L01 status byte
- 169 }
- 170 /**************************************************/
- 171
- 172 /**************************************************
- 173 Function: SPI_Read();
- 174
- 175 Description:
- 176 Read one byte from nRF24L01 register, 'reg'
- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 4
- 177 /**************************************************/
- 178 BYTE SPI_Read ( BYTE reg )
- 179 {
- 180 BYTE reg_val;
- 181
- 182 CSN = 0; // CSN low, initialize SPI communication...
- 183 SPI_RW ( reg ); // Select register to read from..
- 184 reg_val = SPI_RW ( 0 ); // ..then read registervalue
- 185 CSN = 1; // CSN high, terminate SPI communication
- 186
- 187 return ( reg_val ); // return register value
- 188 }
- 189 /**************************************************/
- 190
- 191 /**************************************************
- 192 Function: SPI_Read_Buf();
- 193
- 194 Description:
- 195 Reads 'bytes' #of bytes from register 'reg'
- 196 Typically used to read RX payload, Rx/Tx address
- 197 /**************************************************/
- 198 uchar SPI_Read_Buf ( BYTE reg, BYTE *pBuf, BYTE bytes )
- 199 {
- 200 uchar status, byte_ctr;
- 201
- 202 CSN = 0; // Set CSN low, init SPI tranaction
- 203 status = SPI_RW ( reg ); // Select register to write to and read status byte
- 204
- 205 for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ )
- 206 pBuf[byte_ctr] = SPI_RW ( 0 ); // Perform SPI_RW to read byte from nRF24L01
- 207
- 208 CSN = 1; // Set CSN high again
- 209
- 210 return ( status ); // return nRF24L01 status byte
- 211 }
- 212 /**************************************************/
- 213
- 214 /**************************************************
- 215 Function: SPI_Write_Buf();
- 216
- 217 Description:
- 218 Writes contents of buffer '*pBuf' to nRF24L01
- 219 Typically used to write TX payload, Rx/Tx address
- 220 /**************************************************/
- 221 uchar SPI_Write_Buf ( BYTE reg, BYTE *pBuf, BYTE bytes )
- 222 {
- 223 uchar status, byte_ctr;
- 224
- 225 CSN = 0; // Set CSN low, init SPI tranaction
- 226 status = SPI_RW ( reg ); // Select register to write to and read status byte
- 227
- 228 for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ ) // then write all byte in buffer(*pBuf)
- 229 SPI_RW ( *pBuf++ );
- 230
- 231 CSN = 1; // Set CSN high again
- 232 return ( status ); // return nRF24L01 status byte
- 233 }
- 234 /**************************************************/
- 235
- 236 /**************************************************
- 237 Function: RX_Mode();
- 238
- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 5
- 239 Description:
- 240 This function initializes one nRF24L01 device to
- 241 RX Mode, set RX address, writes RX payload width,
- 242 select RF channel, datarate & LNA HCURR.
- 243 After init, CE is toggled high, which means that
- 244 this device is now ready to receive a datapacket.
- 245 /**************************************************/
- 246 void power_off()
- 247 {
- 248 CE = 0;
- 249 SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0D );
- 250 CE = 1;
- 251 Timer3_Delay10us ( 2 );
- 252 }
- 253 void ifnnrf_rx_mode ( void )
- 254 {
- 255 power_off();
- 256 CE = 0;
- 257 SPI_Write_Buf ( WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH ); // Use the same address on the RX
- -device as the TX device
- 258
- 259 SPI_RW_Reg ( WRITE_REG + EN_AA, 0x01 ); // Enable Auto.Ack:Pipe0
- 260 SPI_RW_Reg ( WRITE_REG + EN_RXADDR, 0x01 ); // Enable Pipe0
- 261 SPI_RW_Reg ( WRITE_REG + RF_CH, 40 ); // Select RF channel 40
- 262 SPI_RW_Reg ( WRITE_REG + RX_PW_P0, TX_PLOAD_WIDTH ); // Select same RX payload width as TX Payload wid
- -th
- 263 SPI_RW_Reg ( WRITE_REG + RF_SETUP, 0x27 ); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
- 264 SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0f ); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:RX. RX_DR enab
- -led..
- 265
- 266 CE = 1; // Set CE pin high to enable RX device
- 267
- 268 // This device is now ready to receive one packet of 16 bytes payload from a TX device sending to add
- -ress
- 269 // '3443101001', with auto acknowledgment, retransmit count of 10, RF channel 40 and datarate = 2Mbps
- -.
- 270
- 271 }
- 272 /**************************************************/
- 273
- 274 /**************************************************
- 275 Function: TX_Mode();
- 276
- 277 Description:
- 278 This function initializes one nRF24L01 device to
- 279 TX mode, set TX address, set RX address for auto.ack,
- 280 fill TX payload, select RF channel, datarate & TX pwr.
- 281 PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX.
- 282
- 283 ToDo: One high pulse(>10us) on CE will now send this
- 284 packet and expext an acknowledgment from the RX device.
- 285 /**************************************************/
- 286 void ifnnrf_tx_mode ( void )
- 287 {
- 288 power_off();
- 289 CE = 0;
- 290
- 291 SPI_Write_Buf ( WRITE_REG + TX_ADDR, TX_ADDRESS, TX_ADR_WIDTH ); // Writes TX_Address to nRF24L01
- 292 SPI_Write_Buf ( WRITE_REG + RX_ADDR_P0, TX_ADDRESS, TX_ADR_WIDTH ); // RX_Addr0 same as TX_Adr for Aut
- -o.Ack
- 293 SPI_Write_Buf ( WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH ); // Writes data to TX payload
- 294
- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 6
- 295 SPI_RW_Reg ( WRITE_REG + EN_AA, 0x01 ); // Enable Auto.Ack:Pipe0
- 296 SPI_RW_Reg ( WRITE_REG + EN_RXADDR, 0x01 ); // Enable Pipe0
- 297 SPI_RW_Reg ( WRITE_REG + SETUP_RETR, 0x1a ); // 500us + 86us, 10 retrans...
- 298 SPI_RW_Reg ( WRITE_REG + RF_CH, 40 ); // Select RF channel 40
- 299 SPI_RW_Reg ( WRITE_REG + RF_SETUP, 0x27 ); // TX_PWR:0dBm, Datarate:2Mbps, LNA:HCURR
- 300 SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0e ); // Set PWR_UP bit, enable CRC(2 bytes) & Prim:TX. MAX_RT & T
- -X_DS enabled..
- 301 CE = 1;
- 302
- 303 }
- 304
- 305 void SPI_CLR_Reg ( BYTE R_T )
- 306 {
- 307 CSN = 0;
- 308
- 309 if ( R_T == 1 ) // CSN low, init SPI transaction
- 310 SPI_RW ( FLUSH_TX ); // ..and write value to it..
- 311 else
- 312 SPI_RW ( FLUSH_RX ); // ..and write value to it..
- 313
- 314 CSN = 1; // CSN high again
- 315 }
- 316
- 317 void ifnnrf_CLERN_ALL()
- 318 {
- 319 SPI_CLR_Reg ( 0 );
- 320 SPI_CLR_Reg ( 1 );
- 321 SPI_RW_Reg ( WRITE_REG + STATUS, 0xff );
- 322 IRQ = 1;
- 323 }
- 324
- 325
- 326
- 327 /*测试*/
- 328 bool nrf24l01_send ( BYTE *pBuf, BYTE bytes )
- 329 {
- 330 BYTE time = 100; //
- 331 IRQ = 1; //中断=1
- 332 SPI_RW_Reg ( WRITE_REG + STATUS, 0xff ); //清写寄存器
- 333
- 334 //发送
- 335 memcpy ( tx_buf, pBuf, bytes < TX_PLOAD_WIDTH ? bytes : TX_PLOAD_WIDTH );
- 336 ifnnrf_tx_mode();
- 337
- 338 //返回状态
- 339 while ( IRQ && time>0 ){time--;}
- 340
- 341 sta = SPI_Read ( STATUS ); //读取状态
- 342 SPI_RW_Reg ( WRITE_REG + STATUS, 0xff ); //清写寄存器
- 343
- 344 if ( ! ( sta & STA_MARK_TX ) ) //发送成功
- 345 {
- 346 ifnnrf_CLERN_ALL();
- 347 return 0;
- 348 }
- 349
- 350 //切换接收模式
- 351 ifnnrf_rx_mode();
- 352 IRQ = 1;
- 353 return 1;
- 354 }
- 355
- C51 COMPILER V9.53.0.0 NRF_24L01 08/21/2018 09:14:46 PAGE 7
- 356 BYTE nrf24l01_recv ( BYTE *pBuf )
- 357 {
- 358 BYTE time = 100; //
- 359 if ( IRQ == 0 ) //中断信号
- 360 {
- 361 sta = SPI_Read ( STATUS );
- 362 SPI_RW_Reg ( WRITE_REG + STATUS, 0xff ); //清写寄存器
- 363
- 364 if ( sta & STA_MARK_RX ) //接收成功
- 365 {
- 366 SPI_Read_Buf ( RD_RX_PLOAD, rx_buf, TX_PLOAD_WIDTH );
- 367 //处理rx_buf
- 368
- 369 //清理rx_buf
- 370 memset ( rx_buf, 0, TX_PLOAD_WIDTH );
- 371 }
- 372 else
- 373 {
- 374 ifnnrf_CLERN_ALL();
- 375 ifnnrf_rx_mode();
- 376 while ( IRQ == 0 && time>0 ){time--;}
- 377 }
- 378 }
- 379 }
- 380
- 381
- 382
- 383 void if_main ( void )
- 384 {
- 385 Timer3_Delay100ms ( 1 );
- 386 init_nrf24l01_io();
- 387 ifnnrf_rx_mode();
- 388
- 389 }
- 390
- 391
- 392
- 393
- C51 COMPILATION COMPLETE. 0 WARNING(S), 1 ERROR(S)
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