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- // nRF24L01.h
- #ifndef _NRF24L01_H_
- #define _NRF24L01_H_
- #include "Common.h"
- #include "Delay.h"
- #define NRF_CE P11 //TX/RX
- #define NRF_CSN P15
- #define NRF_SCK P10
- #define NRF_MOSI P00
- #define NRF_MISO P01
- #define NRF_IRQ P03
- #define TX_ADR_WIDTH 5 // 5 bytes TX address width
- #define RX_ADR_WIDTH 5 // 5 bytes RX address width
- #define TX_PLOAD_WIDTH 32 // 20 bytes TX payload
- #define RX_PLOAD_WIDTH 32 // 20 bytes TX payload
- #ifndef uchar
- typedef unsigned char uchar;
- #endif
- //****************************************************************//
- // SPI(nRF24L01) commands
- #define READ_REG 0x00 // Define read command to register
- #define WRITE_REG 0x20 // Define write command to register
- #define RD_RX_PLOAD 0x61 // Define RX payload register address
- #define WR_TX_PLOAD 0xA0 // Define TX payload register address
- #define FLUSH_TX 0xE1 // Define flush TX register command
- #define FLUSH_RX 0xE2 // Define flush RX register command
- #define REUSE_TX_PL 0xE3 // Define reuse TX payload register command
- #define NOP 0xFF // Define No Operation, might be used to read status register
- //***************************************************//
- // SPI(nRF24L01) registers(addresses)
- #define CONFIG 0x00 // 'Config' register address
- #define EN_AA 0x01 // 'Enable Auto Acknowledgment' register address
- #define EN_RXADDR 0x02 // 'Enabled RX addresses' register address
- #define SETUP_AW 0x03 // 'Setup address width' register address
- #define SETUP_RETR 0x04 // 'Setup Auto. Retrans' register address
- #define RF_CH 0x05 // 'RF channel' register address
- #define RF_SETUP 0x06 // 'RF setup' register address
- #define STATUS 0x07 // 'Status' register address
- #define OBSERVE_TX 0x08 // 'Observe TX' register address
- #define CD 0x09 // 'Carrier Detect' register address
- #define RX_ADDR_P0 0x0A // 'RX address pipe0' register address
- #define RX_ADDR_P1 0x0B // 'RX address pipe1' register address
- #define RX_ADDR_P2 0x0C // 'RX address pipe2' register address
- #define RX_ADDR_P3 0x0D // 'RX address pipe3' register address
- #define RX_ADDR_P4 0x0E // 'RX address pipe4' register address
- #define RX_ADDR_P5 0x0F // 'RX address pipe5' register address
- #define TX_ADDR 0x10 // 'TX address' register address
- #define RX_PW_P0 0x11 // 'RX payload width, pipe0' register address
- #define RX_PW_P1 0x12 // 'RX payload width, pipe1' register address
- #define RX_PW_P2 0x13 // 'RX payload width, pipe2' register address
- #define RX_PW_P3 0x14 // 'RX payload width, pipe3' register address
- #define RX_PW_P4 0x15 // 'RX payload width, pipe4' register address
- #define RX_PW_P5 0x16 // 'RX payload width, pipe5' register address
- #define FIFO_STATUS 0x17 // 'FIFO Status Register' register address
- //***************************************************************//
- // FUNCTION's PROTOTYPES //
- /****************************************************************/
- // void SPI_Init(uchar Mode); // Init HW or SW SPI
- uchar SPI_RW ( uchar byte ); // Single SPI read/write
- uchar SPI_Read ( uchar reg ); // Read one byte from nRF24L01
- uchar SPI_RW_Reg ( uchar reg, uchar byte ); // Write one byte to register 'reg'
- uchar SPI_Write_Buf ( uchar reg, uchar *pBuf, uchar bytes ); // Writes multiply bytes to one register
- uchar SPI_Read_Buf ( uchar reg, uchar *pBuf, uchar bytes ); // Read multiply bytes from one register
- //*****************************************************************/
- void inerDelay_us ( unsigned char n );
- void nRF24L01_init ( void ) ;
- void SetRX_Mode ( void );
- unsigned char nRF24L01_RxPacket ( unsigned char* rx_buf );
- void nRF24L01_TxPacket ( unsigned char * tx_buf );
- extern uchar const TX_ADDRESS[TX_ADR_WIDTH];//TX address
- extern uchar const RX_ADDRESS[RX_ADR_WIDTH];//;RX address
- #endif //_NRF_24L01_
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