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- C51 COMPILER V9.53.0.0 SPI_MASTER_PO 08/20/2018 11:57:34 PAGE 1
- C51 COMPILER V9.53.0.0, COMPILATION OF MODULE SPI_MASTER_PO
- OBJECT MODULE PLACED IN .\Output\SPI_Master_Po.obj
- COMPILER INVOKED BY: D:\Keil_v5\C51\BIN\C51.EXE Code\User\SPI_Master_Po.c OPTIMIZE(8,SPEED) BROWSE INCDIR(Code/Include)
- -DEFINE(FOSC_160000) DEBUG OBJECTEXTEND PRINT(.\Output\LST\SPI_Master_Po.lst) TABS(2) OBJECT(.\Output\SPI_Master_Po.obj)
- line level source
- 1 /*--------------------------------------------------------------------------------------------------------
- --*/
- 2 /*
- - */
- 3 /* Copyright(c) 2017 Nuvoton Technology Corp. All rights reserved.
- - */
- 4 /*
- - */
- 5 /*--------------------------------------------------------------------------------------------------------
- --*/
- 6
- 7 //********************************************************************************************************
- -***
- 8 // Website: http://www.nuvoton.com
- 9 // E-Mail : [email protected]
- 10 // Date : Jan/21/2017
- 11 //********************************************************************************************************
- -***
- 12
- 13 //********************************************************************************************************
- -***
- 14 // File Function: N76E003 SPI in Master mode demo code
- 15 //********************************************************************************************************
- -***
- 16 #include "N76E003.h"
- 17 #include "SFR_Macro.h"
- 18 #include "Function_define.h"
- 19 #include "Common.h"
- 20 #include "Delay.h"
- 21
- 22 //********************************************************************************************************
- -***
- 23 // Application: SPI Function
- 24 // Master send 0x90 and recevie 0x4E
- 25 // Master send 0x01 and recevie 0x55
- 26 // Master send 0x02 and recevie 0x56
- 27 // Master send 0x03 and recevie 0x4F
- 28 // Master send 0x04 and recevie 0x54
- 29 //
- 30 // Master recevie 0x4E and 0x4F form slave after transmitting
- 31 //********************************************************************************************************
- -***
- 32
- 33 //--------------------------------------------------------------------------------------------------------
- ----
- 34 void SPI_Error(void)
- 35 {
- 36 1 printf ("\nSPI error.\n");
- 37 1 while(1) // SPI error and P0.7 flash/
- 38 1 {
- 39 2 P07 = 1;
- 40 2 Timer0_Delay1ms(500);
- 41 2 P07 = 0;
- 42 2 Timer0_Delay1ms(500);
- C51 COMPILER V9.53.0.0 SPI_MASTER_PO 08/20/2018 11:57:34 PAGE 2
- 43 2 }
- 44 1 }
- 45
- 46 //--------------------------------------------------------------------------------------------------------
- ----
- 47 void SPI_Initial(void)
- 48 {
- 49 1 P15_Quasi_Mode; // P15 (SS) Quasi mode
- 50 1 P10_Quasi_Mode; // P10(SPCLK) Quasi mode
- 51 1 P00_Quasi_Mode; // P00 (MOSI) Quasi mode
- 52 1 P01_Quasi_Mode; // P22 (MISO) Quasi mode
- 53 1
- 54 1 set_DISMODF; // SS General purpose I/O ( No Mode Fault )
- 55 1 clr_SSOE;
- 56 1
- 57 1 clr_LSBFE; // MSB first
- 58 1
- 59 1 clr_CPOL; // The SPI clock is low in idle mode
- 60 1 set_CPHA; // The data is sample on the second edge of SPI clock
- 61 1
- 62 1 set_MSTR; // SPI in Master mode
- 63 1 SPICLK_DIV16; // Select SPI clock
- 64 1 set_SPIEN; // Enable SPI function
- 65 1 clr_SPIF;
- 66 1 }
- 67 //--------------------------------------------------------------------------------------------------------
- ----
- 68 void Start_Sending_SPI(UINT8 *pu8MID,UINT8 *pu8DID)
- 69 {
- 70 1 SS = 0;
- 71 1
- 72 1 SPDR = 0x90;
- 73 1 Timer3_Delay10us(1); // Send 0x90 to Slave
- 74 1 while(!(SPSR & SET_BIT7));
- 75 1 clr_SPIF;
- 76 1 if(SPDR != 0x4E)
- 77 1 SPI_Error();
- 78 1 printf ("\nSlave Return %c!\n",SPDR);
- 79 1
- 80 1 SPDR = 0x01; // Send 0x01 to Slave
- 81 1 Timer3_Delay10us(1);
- 82 1 while(!(SPSR & SET_BIT7));
- 83 1 clr_SPIF;
- 84 1 if(SPDR != 0x55)
- 85 1 SPI_Error();
- 86 1 printf ("\nSlave Return %c!\n",SPDR);
- 87 1
- 88 1 SPDR = 0x02; // Send 0x02 to Slave
- 89 1 Timer3_Delay10us(1);
- 90 1 while(!(SPSR & SET_BIT7));
- 91 1 clr_SPIF;
- 92 1 if(SPDR != 0x56)
- 93 1 SPI_Error();
- 94 1 printf ("\nSlave Return %c!\n",SPDR);
- 95 1
- 96 1 SPDR = 0x03; // Send 0x03 to Slave
- 97 1 Timer3_Delay10us(1);
- 98 1 while(!(SPSR & SET_BIT7));
- 99 1 clr_SPIF;
- 100 1 if(SPDR != 0x4F)
- 101 1 SPI_Error();
- 102 1 printf ("\nSlave Return %c!\n",SPDR);
- C51 COMPILER V9.53.0.0 SPI_MASTER_PO 08/20/2018 11:57:34 PAGE 3
- 103 1
- 104 1 SPDR = 0x04; // Send 0x04 to Slave
- 105 1 Timer3_Delay10us(1);
- 106 1 while(!(SPSR & SET_BIT7));
- 107 1 clr_SPIF;
- 108 1 if(SPDR != 0x54)
- 109 1 SPI_Error();
- 110 1 printf ("\nSlave Return %c!\n",SPDR);
- 111 1
- 112 1 SPDR = 0xFF;
- 113 1 Timer3_Delay10us(1);
- 114 1 while(!(SPSR & SET_BIT7));
- 115 1 clr_SPIF;
- 116 1 *pu8MID = SPDR; // Receive Slave 1st DATA from Slave
- 117 1 printf ("\nSlave Return %c!\n",SPDR);
- 118 1
- 119 1 SPDR = 0xFF;
- 120 1 Timer3_Delay10us(1);
- 121 1 while(!(SPSR & SET_BIT7));
- 122 1 clr_SPIF;
- 123 1 *pu8DID = SPDR; // Receive Slave 2nd DATA from Slave
- 124 1 printf ("\nSlave Return %c!\n",SPDR);
- 125 1
- 126 1 SS = 1;
- 127 1 }
- 128 //--------------------------------------------------------------------------------------------------------
- ----
- 129 void main(void)
- 130 {
- 131 1 UINT8 u8MID,u8DID;
- 132 1
- 133 1 Set_All_GPIO_Quasi_Mode;
- 134 1 InitialUART0_Timer1(115200); /* 9600 Baud Rate*/
- 135 1
- 136 1
- 137 1 SPI_Initial();
- 138 1
- 139 1 Start_Sending_SPI(&u8MID,&u8DID);
- 140 1
- 141 1 if((u8MID != 0x4F)&&(u8DID != 0x4E))
- 142 1 SPI_Error();
- 143 1
- 144 1 printf ("\nSPI Test OK!\n");
- 145 1 while(1); // SPI transmission finish and P0.6 flash
- 146 1 }
- 147 //--------------------------------------------------------------------------------------------------------
- ----
- MODULE INFORMATION: STATIC OVERLAYABLE
- CODE SIZE = 477 ----
- CONSTANT SIZE = 47 ----
- XDATA SIZE = ---- ----
- PDATA SIZE = ---- ----
- DATA SIZE = ---- 8
- IDATA SIZE = ---- ----
- BIT SIZE = ---- ----
- END OF MODULE INFORMATION.
- C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
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