/******************************************************************************/ /* -- 居加居-- */ /* // 文件名: // 说明: // 编写人员:kinve // 编写日期:2018-8-21 // 程序维护: // 维护记录: // // */ // 免责声明: // (c) Anxinke Corporation. All rights reserved. /******************************************************************************/ #include "nRF24L01.h" uchar const TX_ADDRESS[TX_ADR_WIDTH] = {0x34, 0x43, 0x10, 0x10, 0x01}; // Define a static TX address uchar const RX_ADDRESS[RX_ADR_WIDTH] = {0x34, 0x43, 0x10, 0x10, 0x01}; // Define a static RX address union { unsigned char byte; struct { unsigned char BIT0 : 1; unsigned char BIT1 : 1; unsigned char BIT2 : 1; unsigned char BIT3 : 1; unsigned char BIT4 : 1; unsigned char BIT5 : 1; unsigned char BIT6 : 1; unsigned char BIT7 : 1; } bit_t; } sta; #define RX_DR sta.bit_t.BIT6 #define TX_DS sta.bit_t.BIT5 #define MAX_RT sta.bit_t.BIT4 #if 0 static uchar bdata sta; sbit RX_DR = sta ^ 6; sbit TX_DS = sta ^ 5; sbit MAX_RT = sta ^ 4; #endif void inerDelay_us ( unsigned char n ) { for ( ; n > 0; n-- ) { #ifdef N76E003_IAR asm ( "nop" ); #else nop; #endif } } void nRF24L01_init ( void ) { inerDelay_us ( 100 ); NRF_CE = 0; // chip enable NRF_CSN = 1; // Spi disable NRF_SCK = 0; // Spi clock line init high } /************************************************** Function: SPI_RW(); Description: Writes one byte to nRF24L01, and return the byte read from nRF24L01 during write, according to SPI protocol **************************************************/ uchar SPI_RW ( uchar byte ) { uchar bit_ctr; for ( bit_ctr = 0; bit_ctr < 8; bit_ctr++ ) // output 8-bit { NRF_MOSI = ( byte & 0x80 ); // output 'byte', MSB to NRF_MOSI byte = ( byte << 1 ); // shift next bit into MSB.. NRF_SCK = 1; // Set NRF_SCK high.. byte |= NRF_MISO; // capture current NRF_MISO bit NRF_SCK = 0; // ..then set NRF_SCK low again } return ( byte ); // return read byte } /**************************************************/ /************************************************** Function: SPI_RW_Reg(); Description: Writes value 'value' to register 'reg' **************************************************/ uchar SPI_RW_Reg ( uchar reg, uchar value ) { uchar status; NRF_CSN = 0; // NRF_CSN low, init SPI transaction status = SPI_RW ( reg ); // select register SPI_RW ( value ); // ..and write value to it.. NRF_CSN = 1; // NRF_CSN high again return ( status ); // return nRF24L01 status byte } /**************************************************/ /************************************************** Function: SPI_Read(); Description: Read one byte from nRF24L01 register, 'reg' **************************************************/ uchar SPI_Read ( uchar reg ) { uchar reg_val; NRF_CSN = 0; // NRF_CSN low, initialize SPI communication... SPI_RW ( reg ); // Select register to read from.. reg_val = SPI_RW ( 0 ); // ..then read registervalue NRF_CSN = 1; // NRF_CSN high, terminate SPI communication return ( reg_val ); // return register value } /**************************************************/ /************************************************** Function: SPI_Read_Buf(); Description: **************************************************/ uchar SPI_Read_Buf ( uchar reg, uchar *pBuf, uchar bytes ) { uchar status, byte_ctr; NRF_CSN = 0; // Set NRF_CSN low, init SPI tranaction status = SPI_RW ( reg ); // Select register to write to and read status byte for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ ) pBuf[byte_ctr] = SPI_RW ( 0 ); // NRF_CSN = 1; return ( status ); // return nRF24L01 status byte } /**************************************************/ /************************************************** Function: SPI_Write_Buf(); Description: Writes contents of buffer '*pBuf' to nRF24L01 Typically used to write TX payload, Rx/Tx address **************************************************/ uchar SPI_Write_Buf ( uchar reg, uchar *pBuf, uchar bytes ) { uchar status, byte_ctr; NRF_CSN = 0; status = SPI_RW ( reg ); for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ ) // SPI_RW ( *pBuf++ ); NRF_CSN = 1; // Set NRF_CSN high again return ( status ); // } /**************************************************/ /************************************************** Function: RX_Mode(); Description: **************************************************/ void SetRX_Mode ( void ) { NRF_CE = 0; SPI_Write_Buf ( WRITE_REG + RX_ADDR_P0, ( uchar * ) RX_ADDRESS, RX_ADR_WIDTH ); // Use the same address on the RX deviNRF_CE as the TX deviNRF_CE SPI_RW_Reg ( WRITE_REG + EN_AA, 0x01 ); // SPI_RW_Reg ( WRITE_REG + EN_RXADDR, 0x01 ); // SPI_RW_Reg ( WRITE_REG + RF_CH, 0 ); // SPI_RW_Reg ( WRITE_REG + RX_PW_P0, RX_PLOAD_WIDTH ); SPI_RW_Reg ( WRITE_REG + RF_SETUP, 0x07 ); SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0f ); NRF_CE = 1; inerDelay_us ( 130 ); } /**************************************************/ unsigned char nRF24L01_RxPacket ( unsigned char* rx_buf ) { unsigned char revale = 0; //SetRX_Mode(); sta.byte = SPI_Read ( STATUS ); // read register STATUS's value if ( RX_DR ) // if reNRF_CEive data ready (RX_DR) interrupt { NRF_CE = 0; SPI_Read_Buf ( RD_RX_PLOAD, rx_buf, RX_PLOAD_WIDTH ); // read reNRF_CEive payload from RX_FIFO buffer revale = 1; //we have reNRF_CEive data } SPI_RW_Reg ( WRITE_REG + STATUS, sta.byte ); // clear RX_DR or TX_DS or MAX_RT interrupt flag return revale; } /************************************************** Function: nRF24L01_TxPacket(); Description: This function initializes one nRF24L01 deviNRF_CE to TX mode, set TX address, set RX address for auto.ack, fill TX payload, select RF channel, datarate & TX pwr. PWR_UP is set, CRC(2 bytes) is enabled, & PRIM:TX. ToDo: One high pulse(>10us) on NRF_CE will now send this packet and expext an acknowledgment from the RX deviNRF_CE. **************************************************/ void nRF24L01_TxPacket ( unsigned char * tx_buf ) { NRF_CE = 0; SPI_Write_Buf ( WRITE_REG + TX_ADDR, ( uchar * ) TX_ADDRESS, TX_ADR_WIDTH ); // SPI_Write_Buf ( WRITE_REG + RX_ADDR_P0, ( uchar * ) TX_ADDRESS, TX_ADR_WIDTH ); SPI_Write_Buf ( WR_TX_PLOAD, tx_buf, TX_PLOAD_WIDTH ); SPI_RW_Reg ( WRITE_REG + EN_AA, 0x01 ); // SPI_RW_Reg ( WRITE_REG + EN_RXADDR, 0x01 ); // SPI_RW_Reg ( WRITE_REG + SETUP_RETR, 0x1a ); // SPI_RW_Reg ( WRITE_REG + RF_CH, 0 ); // SPI_RW_Reg ( WRITE_REG + RF_SETUP, 0x07 ); // SPI_RW_Reg ( WRITE_REG + CONFIG, 0x0e ); // NRF_CE = 1; inerDelay_us ( 10 ); //sta=SPI_Read(STATUS); // read register STATUS's value //SPI_RW_Reg(WRITE_REG+STATUS,SPI_Read(READ_REG+STATUS)); // clear interrupt flag(TX_DS) } /**************************************************/ void nrf_main ( void ) { unsigned char TxBuf[32] = {0}; // unsigned char RxBuf[32] = {0}; nRF24L01_init() ; nRF24L01_TxPacket ( TxBuf ); if ( nRF24L01_RxPacket ( RxBuf ) ) { } }