C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 1 C51 COMPILER V9.53.0.0, COMPILATION OF MODULE NRF24L01_INTE OBJECT MODULE PLACED IN .\Output\NRF24L01_inte.obj COMPILER INVOKED BY: D:\Keil_v5\C51\BIN\C51.EXE ..\..\Code\User\Driver\NRF24L01_inte.c LARGE OPTIMIZE(0,SPEED) BROWSE IN -CDIR(../../Code/Include;../../Code/User;../../Code/User/Common;../../Code/User/Driver) DEFINE(FOSC_160000=1) DEBUG OBJEC -TEXTEND PRINT(.\Output\LST\NRF24L01_inte.lst) TABS(2) OBJECT(.\Output\NRF24L01_inte.obj) line level source 1 #include "NRF24L01_inte.H" 2 #include 3 4 #define RF_CH_DEF 40 5 #define RF_C_NUM_DEF 0 //0ͨµÀÎÞ·¨·¢ËÍ 6 unsigned char RF_CH = RF_CH_DEF; //RFƵµÀ 7 unsigned char RF_C_NUM = RF_C_NUM_DEF; //RFͨµÀ 8 unsigned char NRF24L01_FLAG = 0; //NRF24L01µ±Ç°×´Ì¬±êÖ¾ 9 //DB7; 1½ÓÊÕģʽ 0·¢Éäģʽ 10 //DB6; 1ÓÐÈÎÎñ 0¿ÕÏÐ 11 //DB5; 1·¢Ëͳɹ¦ 0·¢ËÍʧ°Ü(ÅäºÏDB6¼ì²âÊÇ·ñ·¢Ëͳɹ¦) 12 //DB4; 1NRFÕý³£Á¬½Ó 0 ¼ì²â²»µ½Á¬½Ó 13 //DB3; 1½ÓÊÕµ½Êý¾Ý°ü 0 »º³åÇøÎÞÊý¾Ý 14 //DB2; 1 ACKģʽ 0 NOACKģʽ 15 //DB1; 1·¢ËÍÍê×Ô¶¯½øÈë½ÓÊÕģʽ 0¹Ø±Õ×Ô¶¯Çл»Ä£Ê½ 16 unsigned char DYNPD_LEN = 0; //ÓÃÓÚ´æ·Å¶¯Ì¬Êý¾Ý°ü³¤¶È 17 //½ÓÊÕµØÖ·-- ½ÓÊÕÓÐ6¸öͨµÀ 18 const unsigned char RX_ADD[NRF24L01_CH_NUM_MAX + 1][NRF24L01_ADR_LEN] = 19 { 20 {0x00, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //ͨµÀ0 21 {0x01, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //ͨµÀ1 22 {0x02, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //ͨµÀ2 23 {0x03, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //ͨµÀ3 24 {0x04, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //ͨµÀ4 25 {0x05, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4} //ͨµÀ5 26 }; 27 //±¾µØµØÖ·-- ·¢ËÍÖ»ÓÐ1¸öͨµÀ 28 const unsigned char TX_ADD[NRF24L01_CH_NUM_MAX + 1][NRF24L01_ADR_LEN] = 29 { 30 {0x00, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //¶ÔӦͨµÀ0 31 {0x01, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //¶ÔӦͨµÀ1 32 {0x02, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //¶ÔӦͨµÀ2 33 {0x03, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //¶ÔӦͨµÀ3 34 {0x04, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4}, //¶ÔӦͨµÀ4 35 {0x05, TR_ADDR_B1, TR_ADDR_B2, TR_ADDR_B3, TR_ADDR_B4} //¶ÔӦͨµÀ5 36 }; 37 38 39 struct init_reg_data 40 { 41 unsigned char reg; 42 unsigned char data1; 43 unsigned char *data2; 44 unsigned char len2; 45 }; 46 47 const struct init_reg_data init_first[] = 48 { 49 #if 1 50 //RXÈ«²¿Í¨µÀÅäÖà 51 {NRF24L01_RX_ADDR_P0, 0, RX_ADD[0], NRF24L01_ADR_LEN}, //P0½ÓÊÕµØÖ· 52 {NRF24L01_RX_ADDR_P1, 0, RX_ADD[1], NRF24L01_ADR_LEN}, //P1½ÓÊÕµØÖ· 53 {NRF24L01_RX_ADDR_P2, 0, RX_ADD[2], 1}, //P2½ÓÊÕµØÖ· C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 2 54 {NRF24L01_RX_ADDR_P3, 0, RX_ADD[3], 1}, //P3½ÓÊÕµØÖ· 55 {NRF24L01_RX_ADDR_P4, 0, RX_ADD[4], 1}, //P4½ÓÊÕµØÖ· 56 {NRF24L01_RX_ADDR_P5, 0, RX_ADD[5], 1}, //P5½ÓÊÕµØÖ· 57 {NRF24L01_RX_PW_P0, NRF24L01_ADR_LEN, NULL, 0}, //P0½ÓÊÜͨµÀÓÐЧ¿í¶È 58 {NRF24L01_RX_PW_P1, NRF24L01_ADR_LEN, NULL, 0}, //P1½ÓÊÜͨµÀÓÐЧ¿í¶È 59 {NRF24L01_RX_PW_P2, NRF24L01_ADR_LEN, NULL, 0}, //P2½ÓÊÜͨµÀÓÐЧ¿í¶È 60 {NRF24L01_RX_PW_P3, NRF24L01_ADR_LEN, NULL, 0}, //P3½ÓÊÜͨµÀÓÐЧ¿í¶È 61 {NRF24L01_RX_PW_P4, NRF24L01_ADR_LEN, NULL, 0}, //P4½ÓÊÜͨµÀÓÐЧ¿í¶È 62 {NRF24L01_RX_PW_P5, NRF24L01_ADR_LEN, NULL, 0}, //P5½ÓÊÜͨµÀÓÐЧ¿í¶È 63 //ÆäËûÅäÖà 64 {NRF24L01_SETUP_AW, NRF24L01_ADR_LEN - 2, NULL, 0}, //ÉèÖõØÖ·³¤¶ÈΪ NRF24L01_ADR_LEN 65 {NRF24L01_RF_SETUP, 0x0f, NULL, 0}, //ÉèÖÃTX·¢Éä²ÎÊý,7dbÔöÒæ,2Mbps,µÍÔëÉùÔöÒ濪Æô 66 //RXģʽÅäÖà 67 {NRF24L01_FEATURE, 0x06, NULL, 0}, //ʹÄܶ¯Ì¬Êý¾Ý°ü³¤¶È,AUTO_ACKģʽ 68 //TXģʽÅäÖà 69 {NRF24L01_SETUP_RETR, 0x1a, NULL, 0}, //ÉèÖÃ×Ô¶¯ÖØ·¢¼ä¸ôʱ¼ä:500us + 86us;ÖØ·¢´ÎÊý:10´Î 70 71 //ͨµÀ/Ƶ¶Î/TXµØÖ·ÅäÖà 72 {NRF24L01_RF_CH, RF_CH_DEF, NULL, 0}, //ÉèÖÃRFƵµÀΪRFCH [6:0] 73 {NRF24L01_EN_AA, 1 << RF_C_NUM_DEF, NULL, 0}, //ͨµÀ×Ô¶¯Ó¦´ð : 0~5ͨµÀ 74 {NRF24L01_EN_RXADDR, 1 << RF_C_NUM_DEF, NULL, 0}, //½ÓÊÕͨµÀʹÄÜ : 0~5ͨµÀ 75 {NRF24L01_TX_ADDR, 0, TX_ADD[RF_C_NUM_DEF], NRF24L01_ADR_LEN}, //дTX½ÚµãµØÖ· 76 {NRF24L01_DYNPD, 1 << RF_C_NUM_DEF, NULL, 0}, //Ñ¡ÔñͨµÀ0¶¯Ì¬Êý¾Ý°ü³¤¶È 77 #else {NRF24L01_RX_PW_P0, NRF24L01_ADR_LEN, NULL, 0}, //ÉèÖýÓÊÕÊý¾Ý³¤¶È£¬±¾´ÎÉèÖÃΪ32×Ö½Ú //{NRF24L01_FLUSE_RX, 0xff, NULL, 0}, //Çå³ýRX FIFO¼Ä´æÆ÷ {NRF24L01_TX_ADDR, 0, TX_ADD[0], NRF24L01_ADR_LEN}, //дTX½ÚµãµØÖ· {NRF24L01_RX_ADDR_P0, 0, RX_ADD[0], NRF24L01_ADR_LEN}, //ÉèÖÃRX½ÚµãµØÖ·,Ö÷ҪΪÁËʹÄÜACK {NRF24L01_EN_AA, 0x01, NULL, 0}, //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð {NRF24L01_EN_RXADDR, 0x01, NULL, 0}, //ʹÄÜͨµÀ0µÄ½ÓÊÕµØÖ· {NRF24L01_SETUP_RETR, 0x1a, NULL, 0}, //ÉèÖÃ×Ô¶¯ÖØ·¢¼ä¸ôʱ¼ä:500us + 86us;×î´ó×Ô¶¯ÖØ·¢´ÎÊý:10(a) -´Î {NRF24L01_RF_CH, 40, NULL, 0}, //ÉèÖÃRFͨµÀΪ40 ÊÕ·¢±ØÐëÒ»Ö£¬0Ϊ2.4GHz + 40 {NRF24L01_RF_SETUP, 0x0f, NULL, 0}, //ÉèÖÃTX·¢Éä²ÎÊý,0dbÔöÒæ,2Mbps,µÍÔëÉùÔöÒ濪Æô {NRF24L01_CONFIG, 0x0f, NULL, 0}, //ÅäÖûù±¾¹¤×÷ģʽµÄ²ÎÊý;PWR_UP,EN_CRC,16BIT_CRC,½ÓÊÕģʽ,¿ªÆ -ôËùÓÐÖÐ¶Ï #endif 92 }; 93 94 const struct init_reg_data init_recv_mod[] = 95 { 96 {NRF24L01_CONFIG, 0x0f, NULL, 0}, //bit0½ÓÊÕģʽ 97 {NRF24L01_STATUS, 0x70, NULL, 0}, //ÇåÖÐ¶Ï 98 {NRF24L01_FLUSE_RX, NRF24L01_NOP, NULL, 0}, //ÇåÀí½ÓÊÕFIFO 99 }; 100 101 const struct init_reg_data init_send_mod[] = 102 { 103 {NRF24L01_CONFIG, 0x0e, NULL, 0}, //bit0·¢ËÍģʽ 104 {NRF24L01_STATUS, 0x70, NULL, 0}, //ÇåÖÐ¶Ï 105 {NRF24L01_FLUSE_TX, NRF24L01_NOP, NULL, 0}, //ÇåÀí·¢ËÍFIFO 106 }; 107 108 void NRF24L01_Init_reg ( struct init_reg_data *addr, unsigned char len ) 109 { 110 1 unsigned char i; 111 1 112 1 for ( i = 0; i < len; i++ ) 113 1 { C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 3 114 2 if ( addr[i].data2 == NULL ) 115 2 { 116 3 NRF24L01_Write_Reg ( addr[i].reg, addr[i].data1 ); 117 3 } 118 2 else 119 2 { 120 3 NRF24L01_Write_Buf ( addr[i].reg, addr[i].data2, addr[i].len2 ); 121 3 } 122 2 } 123 1 } 124 125 unsigned char NRF24L01_check_reg ( struct init_reg_data *addr, unsigned char len ) 126 { 127 1 unsigned char buff[5]; 128 1 unsigned char i, j; 129 1 130 1 for ( i = 0; i < len; i++ ) 131 1 { 132 2 if ( addr[i].data2 == NULL ) 133 2 { 134 3 buff[0] = NRF24L01_Read_Reg ( addr[i].reg ); 135 3 136 3 if ( buff[0] != addr[i].data1 ) 137 3 { 138 4 return 0; 139 4 } 140 3 } 141 2 else 142 2 { 143 3 NRF24L01_Read_Buf ( addr[i].reg, buff, addr[i].len2 ); 144 3 145 3 for ( j = 0; j < 5; j++ ) 146 3 { 147 4 if ( buff[j] != addr[i].data2[j] ) 148 4 { 149 5 return 0; 150 5 } 151 4 } 152 3 } 153 2 } 154 1 155 1 return 1; 156 1 } 157 158 //Ïò´Ó»ú·¢ËÍÒ»¸ö×Ö½ÚÊý¾Ý²¢·µ»Ø½ÓÊÕÊý¾Ý 159 /**************************************************/ 160 #if 0 unsigned char SPI_WriteRead ( unsigned char byte ) { unsigned char bit_ctr; for ( bit_ctr = 0; bit_ctr < 8; bit_ctr++ ) // Êä³ö8λ { NRF_MOSI = ( byte & 0x80 ); // MSB TO MOSI byte = ( byte << 1 ); // shift next bit to MSB NRF_SCK = 1; byte |= NRF_MISO; // capture current MISO bit NRF_SCK = 0; } return byte; } C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 4 #else 177 unsigned char SPI_WriteRead ( unsigned char byte ) 178 { 179 1 unsigned char i; 180 1 SPDR = byte; //д¼Ä´æÆ÷ 181 1 182 1 for ( i = 0; i < 255; i++ ) 183 1 { 184 2 if ( SPSR & SET_BIT7 ) 185 2 { 186 3 break; //µÈ´ý´«Êä 187 3 } 188 2 } 189 1 190 1 SPSR &= ~SET_BIT7; 191 1 byte = SPDR; //¶Á¼Ä´æÆ÷ 192 1 return byte; 193 1 } 194 195 #endif 196 197 //дNRF24L01¼Ä´æÆ÷£¬·µ»Ø״ֵ̬ 198 unsigned char NRF24L01_Write_Reg ( unsigned char reg, unsigned char value ) 199 { 200 1 unsigned char BackDate; 201 1 NRF_CE = 0; //ÔÚд¼Ä´æÆ÷֮ǰһ¶¨Òª½øÈë´ý»úģʽ»òµôµçģʽ¡£ 202 1 NRF_CSN = 0; 203 1 if( reg <= 0x1F ){ //0~0x1f 204 2 reg = NRF24L01_WRITE_REG | reg; 205 2 } 206 1 SPI_WriteRead ( reg ); 207 1 BackDate = SPI_WriteRead ( value ); 208 1 NRF_CSN = 1; 209 1 NRF_CE = 1; //»Ö¸´Õý³£Ä£Ê½ 210 1 return ( BackDate ); 211 1 } 212 //¶ÁNRF24L01¼Ä´æÆ÷£¬·µ»Ø¼Ä´æÆ÷Öµ 213 unsigned char NRF24L01_Read_Reg ( unsigned char reg ) 214 { 215 1 unsigned char BackDate; 216 1 NRF_CSN = 0; 217 1 if( reg <= 0x1F ){ //0~0x1f 218 2 reg = NRF24L01_READ_REG | reg; 219 2 } 220 1 SPI_WriteRead ( reg ); 221 1 BackDate = SPI_WriteRead ( NRF24L01_NOP ); //NOP£¬ÎÞЧֵ£¬ÓÃÓÚ¶ÁÈ¡ 222 1 NRF_CSN = 1; 223 1 return ( BackDate ); 224 1 } 225 226 //Ïò»º³åÇøдÈëÊý¾Ý 227 unsigned char NRF24L01_Write_Buf ( unsigned char reg, unsigned char *pBuf, unsigned char bytes ) 228 { 229 1 unsigned char status, byte_ctr; 230 1 231 1 NRF_CE = 0; //ÔÚд¼Ä´æÆ÷֮ǰһ¶¨Òª½øÈë´ý»úģʽ»òµôµçģʽ¡£ 232 1 NRF_CSN = 0; 233 1 234 1 if( reg <= 0x1F ){ //0~0x1f 235 2 reg = NRF24L01_WRITE_REG | reg; 236 2 } 237 1 status = SPI_WriteRead ( reg ); C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 5 238 1 239 1 for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ ) 240 1 { 241 2 SPI_WriteRead ( *pBuf++ ); 242 2 } 243 1 244 1 NRF_CSN = 1; 245 1 NRF_CE = 1; //»Ö¸´Õý³£Ä£Ê½ 246 1 return ( status ); 247 1 } 248 249 //¶ÁÈ¡»º³åÇøÊý¾Ý 250 void NRF24L01_Read_Buf ( unsigned char reg, unsigned char *pBuf, unsigned char bytes ) 251 { 252 1 unsigned char byte_ctr; 253 1 NRF_CSN = 0; 254 1 if( reg <= 0x1F ){ //0~0x1f 255 2 reg = NRF24L01_READ_REG | reg; 256 2 } 257 1 SPI_WriteRead ( reg ); 258 1 259 1 for ( byte_ctr = 0; byte_ctr < bytes; byte_ctr++ ) 260 1 { 261 2 pBuf[byte_ctr] = SPI_WriteRead ( NRF24L01_NOP ); //NOP£¬ÎÞЧֵ£¬ÓÃÓÚ¶ÁÈ¡ 262 2 } 263 1 264 1 NRF_CSN = 1; 265 1 } 266 267 268 /* 269 PIPEN ÖжÏʹÄÜ 270 PINEN Õý·´ÏòÌØÐÔ 271 PICON ´¥·¢·½Ê½£¨µçƽ»ò±ßÑؼì²â£© 272 PIF ÖжϱêÖ¾ 273 */ 274 void NRF24L01_Interrupt_P03 ( void ) 275 { 276 1 //P0M1|=SET_BIT3;P0M2&=~SET_BIT3; //input 277 1 PICON &= ~ ( SET_BIT0 | SET_BIT1 ); 278 1 PICON |= ( 0x00 ); //[1:0]=0.¶Ë¿Ú0 279 1 PICON |= SET_BIT5; //ͨµÀ3=1.±ßÑØ´¥·¢ 280 1 PINEN |= SET_BIT3; // 1 = µÍµçƽ/ ϽµÑØ´¥·¢ÖÐ¶Ï 281 1 PIPEN &= ~SET_BIT3; //0 = ¹Ø±ÕÖжÏ(¸ßµçƽ/ ÉÏÉýÑØ´¥·¢ÖжÏ) 282 1 EIE |= SET_BIT1; //¹Ü½ÅÖжϣ¬×î¶à8¸ö,ÖжϺÅ7 283 1 EA = 1; // ×ÜÖÐ¶Ï 284 1 } 285 286 287 288 289 uint8 NRF24L01_Wait_Param ( void ); 290 //NRF24L01³õʼ»¯º¯Êý 291 void NRF24L01_Init ( void ) 292 { 293 1 //uint8 i; 294 1 #if BK2423 //NRF_CE = 0; //ÔÚд¼Ä´æÆ÷֮ǰһ¶¨Òª½øÈë´ý»úģʽ»òµôµçģʽ¡£ NRF24L01_Write_Reg ( ACTIVATE_CMD, 0x73 ); //NRF_CE = 1; #endif 299 1 C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 6 300 1 NRF_CSN = 1; // Spi disable 301 1 NRF_SCK = 0; // Spi clock line init high 302 1 303 1 //NRF_CE = 0; //ÔÚд¼Ä´æÆ÷֮ǰһ¶¨Òª½øÈë´ý»úģʽ»òµôµçģʽ¡£ 304 1 //ÅäÖüĴæÆ÷ 305 1 NRF24L01_FLAG |= NRF24L01_AUTO_ACK; //ÊÇ·ñ¿ªÆôÓ¦´ðģʽ 306 1 NRF24L01_FLAG |= NRF24L01_AUTO_RX; //·¢ËÍÍêÊÇ·ñ×Ô¶¯½øÈë½ÓÊÕģʽ 307 1 308 1 #if 0 //0-5ͨµÀ½ÓÊÕµØÖ·,³¤¶ÈÅäÖà for ( i = 0; i <= NRF24L01_CH_NUM_MAX; i++ ) { NRF24L01_Write_Buf ( NRF24L01_RX_ADDR_P0 + i, RX_ADD[i], NRF24L01_ADR_LEN ); //ÉèÖýÓÊÕµØÖ· NRF24L01_Write_Reg ( NRF24L01_RX_PW_P0 + i, NRF24L01_ADR_LEN ); //½ÓÊÜͨµÀÓÐЧ¿í¶È } NRF24L01_Write_Reg ( NRF24L01_SETUP_AW, NRF24L01_ADR_LEN - 2 ); //ÉèÖõØÖ·³¤¶ÈΪ NRF24L01_ADR_LEN NRF24L01_Write_Reg ( NRF24L01_RF_CH, RF_CH ); //ÉèÖÃRFͨµÀΪRFCH [6:0] NRF24L01_Write_Reg ( NRF24L01_RF_SETUP, 0x07 ); //ÉèÖÃTX·¢Éä²ÎÊý,7dbÔöÒæ,1Mbps,µÍÔëÉùÔöÒ濪 -Æô NRF24L01_Write_Reg ( NRF24L01_EN_AA, 0x01 ); //ʹÄÜͨµÀ0µÄ×Ô¶¯Ó¦´ð NRF24L01_Write_Reg ( NRF24L01_EN_RXADDR, 0x01 ); //ʹÄÜͨµÀ0µÄ½ÓÊÕµØÖ· //RXģʽÅäÖà //NRF24L01_Write_Buf ( NRF24L01_RX_ADDR_P0, RX_ADD[0], NRF24L01_ADR_LEN ); //дRX½ÚµãµØÖ· NRF24L01_Write_Reg ( NRF24L01_FEATURE, 0x05 ); //ʹÄܶ¯Ì¬Êý¾Ý°ü³¤¶È,AUTO_ACKģʽ NRF24L01_Write_Reg ( NRF24L01_DYNPD, 0X01 ); //Ñ¡ÔñͨµÀ0¶¯Ì¬Êý¾Ý°ü³¤¶È NRF24L01_Write_Reg ( NRF24L01_FLUSE_RX, NRF24L01_NOP ); //Çå³ýRX FIFO¼Ä´æÆ÷,д1Çå³ý //TXģʽÅäÖà NRF24L01_Write_Buf ( NRF24L01_TX_ADDR , TX_ADD[RF_C_NUM], NRF24L01_ADR_LEN ); //дTX½ÚµãµØÖ· NRF24L01_Write_Reg ( NRF24L01_SETUP_RETR, 0x1f ); //ÉèÖÃ×Ô¶¯ÖØ·¢¼ä¸ôʱ¼ä:500us + 86us;×î´ó×Ô¶¯Ö -Ø·¢´ÎÊý:15´Î NRF24L01_Write_Reg ( NRF24L01_FLUSE_TX, NRF24L01_NOP ); //Çå³ýTX FIFO¼Ä´æÆ÷,д1Çå³ý NRF24L01_RxMode(); //ĬÈϽøÈë½ÓÊÕģʽ //NRF_CE = 1; NRF24L01_Change_Working_Frequency ( 0x64 ); NRF24L01_Change_Data_Channel ( 2 ); #else 336 1 NRF24L01_Init_reg ( init_first, sizeof ( init_first ) / sizeof ( init_first[0] ) ); 337 1 #endif 338 1 339 1 NRF24L01_RxMode(); 340 1 NRF24L01_Interrupt_P03(); 341 1 342 1 NRF24L01_Wait_Param(); 343 1 } 344 345 //NRF24L01½øÈë·¢ËÍģʽ 346 void NRF24L01_TxMode ( void ) 347 { 348 1 //NRF_CE = 0; //ÔÚд¼Ä´æÆ÷֮ǰһ¶¨Òª½øÈë´ý»úģʽ»òµôµçģʽ¡£ 349 1 #if 0 NRF24L01_Write_Reg ( NRF24L01_CONFIG, 0x0e ); NRF24L01_Write_Reg ( NRF24L01_STATUS, 0x70 ); //Çå³ýÖжϱêÖ¾ NRF24L01_Write_Reg ( NRF24L01_FLUSE_TX, NRF24L01_NOP ); //Çå³ýTX FIFO¼Ä´æÆ÷,д1Çå³ý #else 354 1 NRF24L01_Init_reg ( init_send_mod, sizeof ( init_send_mod ) / sizeof ( init_send_mod[0] ) ); 355 1 #endif 356 1 //NRF_CE = 1; 357 1 NRF24L01_FLAG &= ~NRF24L01_MODE_RX; //ÐÞ¸Ä״̬±êʶΪ·¢Éäģʽ 358 1 NRF24L01_FLAG &= ~NRF24L01_BUSY; //BUSY±êÖ¾ÖÃ0 359 1 NRF24L01_FLAG &= ~NRF24L01_RECIVE;//Çå³ýÓÐÊý¾Ý±êÖ¾ C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 7 360 1 Timer3_Delay10us ( 1 ); 361 1 } 362 //NRF24L01½øÈë½ÓÊÕģʽ 363 void NRF24L01_RxMode ( void ) 364 { 365 1 //NRF_CE = 0; //ÔÚд¼Ä´æÆ÷֮ǰһ¶¨Òª½øÈë´ý»úģʽ»òµôµçģʽ¡£ 366 1 #if 0 NRF24L01_Write_Reg ( NRF24L01_CONFIG, 0x0f ); //ÅäÖûù±¾¹¤×÷ģʽµÄ²ÎÊý;PWR_UP,EN_CRC,16BIT_CRC,½ÓÊÕÄ£ -ʽ NRF24L01_Write_Reg ( NRF24L01_STATUS, 0x70 ); //Çå³ýÖжϱêÖ¾ NRF24L01_Write_Reg ( NRF24L01_FLUSE_RX, NRF24L01_NOP ); //Çå³ýRX FIFO¼Ä´æÆ÷,д1Çå³ý #else 371 1 NRF24L01_Init_reg ( init_recv_mod, sizeof ( init_recv_mod ) / sizeof ( init_recv_mod[0] ) ); 372 1 #endif 373 1 //NRF_CE = 1; 374 1 NRF24L01_FLAG |= NRF24L01_MODE_RX; //ÐÞ¸Ä״̬±êʶΪ½ÓÊÕģʽ 375 1 NRF24L01_FLAG &= ~NRF24L01_BUSY; //BUSY±êÖ¾ÖÃ0 376 1 DYNPD_LEN = 0; //Çå0¶¯Ì¬Êý¾Ý°ü³¤¶È 377 1 NRF24L01_FLAG &= ~NRF24L01_RECIVE;//Çå³ýÓÐÊý¾Ý±êÖ¾ 378 1 Timer3_Delay10us ( 13 ); 379 1 } 380 381 382 uint8 NRF24L01_Wait_Param ( void ) 383 { 384 1 uint8 res = 1; 385 1 #if 1 386 1 uint8 i; 387 1 uint8 TX_Buff[5]={0}, RX_Buff[5]={0}, FRE, CH; 388 1 NRF24L01_Read_Buf ( NRF24L01_TX_ADDR, TX_Buff, NRF24L01_ADR_LEN ); 389 1 NRF24L01_Read_Buf ( NRF24L01_RX_ADDR_P0 + RF_C_NUM, RX_Buff, NRF24L01_ADR_LEN ); 390 1 CH = NRF24L01_Read_Reg ( NRF24L01_EN_RXADDR ); 391 1 FRE = NRF24L01_Read_Reg ( NRF24L01_RF_CH ); 392 1 393 1 //½ÓÊÕ/·¢Ë͵ØÖ·¼ì²é 394 1 for ( i = 0; i < ( RF_C_NUM < 2 ? 5 : 1 ); i++ ) 395 1 { 396 2 if ( TX_Buff[i] != TX_ADD[RF_C_NUM][i] || RX_Buff[i] != RX_ADD[RF_C_NUM][i] ) 397 2 { 398 3 res = 0; 399 3 break; 400 3 } 401 2 } 402 1 403 1 //ͨµÀʹÄܼì²é 404 1 if ( ! ( CH & ( 1 << RF_C_NUM ) ) ) 405 1 { 406 2 res = 0; 407 2 } 408 1 409 1 //ƵµÀ¼ì²é 410 1 if ( FRE != RF_CH ) 411 1 { 412 2 res = 0; 413 2 } 414 1 415 1 DBG ( "TX=%x %x %x %x %x\n" 416 1 "RX=%x %x %x %x %x\n" 417 1 "CH=%d\n" 418 1 "FRE=%d\n", 419 1 TX_Buff[0], TX_Buff[1], TX_Buff[2], TX_Buff[3], TX_Buff[4], 420 1 RX_Buff[0], RX_Buff[1], RX_Buff[2], RX_Buff[3], RX_Buff[4], C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 8 421 1 CH, 422 1 FRE); 423 1 #else res = NRF24L01_check_reg ( init_first, sizeof ( init_first ) / sizeof ( init_first[0] ) ); #endif 426 1 427 1 res ? ( NRF24L01_FLAG |= NRF24L01_CHECK ) : ( NRF24L01_FLAG &= ~NRF24L01_CHECK ); 428 1 return res; 429 1 } 430 431 432 //NRF24L01·¢ËÍÊý¾Ý 433 void NRF24L01_SendFrame ( unsigned char *temp, unsigned char len ) 434 { 435 1 if ( NRF24L01_FLAG & NRF24L01_MODE_RX ) 436 1 { 437 2 NRF24L01_TxMode(); 438 2 } 439 1 440 1 NRF24L01_FLAG |= NRF24L01_BUSY; //BUSY±êÖ¾ÖÃ1 441 1 NRF24L01_FLAG &= ~NRF24L01_TX_ACCESS;//Çå³ý·¢Ëͳɹ¦±êÖ¾ 442 1 //NRF_CE = 0; 443 1 444 1 if ( NRF24L01_FLAG & NRF24L01_AUTO_ACK ) 445 1 { 446 2 NRF24L01_Write_Buf ( NRF24L01_WR_TX_PLOAD, temp, len ); //д´ý·¢Êý¾Ý°ü,ÐèÒª»ØÓ¦ 447 2 } 448 1 else 449 1 { 450 2 NRF24L01_Write_Buf ( W_TX_PAYLOAD_NOACK_CMD, temp, len ); //д´ý·¢Êý¾Ý°ü,ÎÞÐë»ØÓ¦ 451 2 } 452 1 453 1 //NRF_CE = 1; 454 1 } 455 456 //NRF24L01½ÓÊÕÊý¾Ý 457 void NRF24L01_RecvFrame ( unsigned char *temp ) 458 { 459 1 DYNPD_LEN = NRF24L01_Read_Reg ( R_RX_PL_WID_CMD ); 460 1 461 1 if ( DYNPD_LEN > 32 ) 462 1 { 463 2 NRF24L01_RxMode(); //ÖØгõʼ»¯½ÓÊÕģʽ 464 2 } 465 1 else 466 1 { 467 2 NRF24L01_Read_Buf ( NRF24L01_RD_RX_PLOAD, temp, DYNPD_LEN ); //¶ÁÈ¡»º³åÇøÊý¾Ý 468 2 } 469 1 470 1 NRF24L01_FLAG &= ~NRF24L01_RECIVE;//Çå³ýÓÐÊý¾Ý±êÖ¾ 471 1 } 472 //¸ü¸Ä¹¤×÷ƵÂÊ0~7f 473 void NRF24L01_Change_Working_Frequency ( unsigned char ch ) //0~7f 474 { 475 1 if ( ch > 0x7f ) 476 1 { 477 2 return; 478 2 } 479 1 480 1 //NRF_CE = 0; 481 1 NRF24L01_Write_Reg ( NRF24L01_RF_CH, ch & 0x7F ); //ÉèÖÃRFƵµÀ 482 1 //NRF_CE = 1; C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 9 483 1 RF_CH = ch & 0x7F; //ͬ²½ÉèÖõ½ÏµÍ³²ÎÊý 484 1 } 485 486 //¸ü¸ÄͨµÀ0~3f 487 void NRF24L01_Change_Data_Channel ( unsigned char ch ) //0~5 488 { 489 1 if ( ch > NRF24L01_CH_NUM_MAX ) 490 1 { 491 2 return; 492 2 } 493 1 494 1 RF_C_NUM = ch; 495 1 496 1 NRF24L01_Write_Reg ( NRF24L01_EN_AA, 1 << RF_C_NUM ); //ͨµÀ×Ô¶¯Ó¦´ð 497 1 NRF24L01_Write_Reg ( NRF24L01_EN_RXADDR, 1 << RF_C_NUM ); //½ÓÊÕͨµÀʹÄÜ 498 1 499 1 NRF24L01_Write_Buf ( NRF24L01_TX_ADDR , TX_ADD[RF_C_NUM], NRF24L01_ADR_LEN ); //дTX½ÚµãµØÖ· 500 1 NRF24L01_Write_Reg ( NRF24L01_DYNPD, 1 << RF_C_NUM ); //ͨµÀTX×Ô¶¯³¤¶È 501 1 } 502 503 //NRF24L01Öжϴ¦Àí:µ±×´Ì¬¼Ä´æÆ÷ÖÐ TX_DS¡¢ RX_DR »ò MAX_RT Ϊ¸ßʱ´¥·¢Öжϡ£ 504 #ifdef N76E003_IAR #pragma vector=0x3B __interrupt void NRF24L01_Handler ( void ) #else 508 void NRF24L01_Handler ( void ) interrupt 7 //interrupt address is 0x001B 509 #endif 510 { 511 1 unsigned char state, fifo_state, flag; 512 1 clr_EPI; //¹Ø±Õ¹Ü½ÅÖжÏ7 513 1 flag = PIF; 514 1 PIF = 0x00; //Çå³ýÈ«²¿±êÖ¾ 515 1 state = NRF24L01_Read_Reg ( NRF24L01_STATUS ); //¶ÁNRF24L01״̬¼Ä´æÆ÷ 516 1 fifo_state = NRF24L01_Read_Reg ( NRF24L01_FIFO_STATUS ); //¶ÁNRF24L01FIFO״̬¼Ä´æÆ÷ 517 1 NRF24L01_Write_Reg ( NRF24L01_STATUS, state ); //Çå³ýÖжÏ,д1Çå³ý 518 1 519 1 //·¢Ëͳɹ¦ÖÐ¶Ï 520 1 if ( state & NRF24L01_STATUS_TX_DS ) 521 1 { 522 2 NRF24L01_FLAG &= ~NRF24L01_BUSY; //BUSY±êÖ¾ÖÃ0 523 2 NRF24L01_FLAG |= NRF24L01_TX_ACCESS;//·¢Ëͳɹ¦±êÖ¾ÖÃ1 524 2 525 2 if ( NRF24L01_FLAG & NRF24L01_AUTO_RX ) 526 2 { 527 3 NRF24L01_RxMode(); //ÖØгõʼ»¯½ÓÊÕģʽ 528 3 } 529 2 } 530 1 531 1 //´ïµ½×î´óÖØ·¢´ÎÊýÖÐ¶Ï 532 1 if ( state & NRF24L01_STATUS_MAX_RT ) 533 1 { 534 2 NRF24L01_Write_Reg ( NRF24L01_FLUSE_TX, NRF24L01_NOP ); //Çå³ýTX FIFO¼Ä´æÆ÷,д1Çå³ý 535 2 NRF24L01_FLAG &= ~NRF24L01_BUSY; //BUSY±êÖ¾ÖÃ0 536 2 NRF24L01_FLAG &= ~NRF24L01_TX_ACCESS;//·¢Ëͳɹ¦±êÖ¾ÖÃ0 537 2 } 538 1 539 1 //½ÓÊÕµ½Êý¾ÝÖÐ¶Ï 540 1 if ( state & NRF24L01_STATUS_RX_DR ) 541 1 { 542 2 NRF24L01_FLAG |= NRF24L01_RECIVE; //½ÓÊÕµ½Êý¾Ý±ê־λÖÃ1 543 2 } 544 1 C51 COMPILER V9.53.0.0 NRF24L01_INTE 09/28/2018 15:19:33 PAGE 10 545 1 //TX_FIFOÂúÖÐ¶Ï 546 1 if ( state & NRF24L01_STATUS_TX_FULL ) 547 1 { 548 2 NRF24L01_TxMode(); //ÖØгõʼ»¯·¢Éäģʽ 549 2 } 550 1 551 1 //RX_FIFOÂú 552 1 if ( fifo_state & NRF24L01_STATUS_RX_FULL ) 553 1 { 554 2 NRF24L01_RxMode(); //ÖØгõʼ»¯½ÓÊÕģʽ 555 2 } 556 1 557 1 state = NRF24L01_Read_Reg ( NRF24L01_CONFIG ); //¶ÁNRF24L01״̬¼Ä´æÆ÷ 558 1 set_EPI; //¿ªÆô¹Ü½ÅÖжÏ7 559 1 } MODULE INFORMATION: STATIC OVERLAYABLE CODE SIZE = 2533 ---- CONSTANT SIZE = 60 ---- XDATA SIZE = 288 ---- PDATA SIZE = ---- ---- DATA SIZE = ---- ---- IDATA SIZE = ---- ---- BIT SIZE = ---- ---- END OF MODULE INFORMATION. C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)